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pan/mdg: Fix 16-bit alignment with spiller

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The loop over sources has to happen for every instruction, regardless of whether
we also need to register allocate the destination. The other source loops handle
this properly, but this one was missed.

Fixes spilling failure in shaders/android/angle/aztec_ruins/16.shader_test when
the input NIR is shuffled a bit (from reordering passes).

Fixes: 129d390bd8 ("pan/mdg: Fix bound setting in RA for sources")
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19093>
This commit is contained in:
Alyssa Rosenzweig
2022-10-15 21:32:11 -04:00
committed by Marge Bot
parent 2c446b6636
commit 829f769e60
1 changed files with 12 additions and 6 deletions
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18
src/panfrost/midgard/midgard_ra.c
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@@ -577,6 +577,18 @@ allocate_registers(compiler_context *ctx, bool *spilled)
}
}
/* Anything read as 16-bit needs proper alignment to ensure the
* resulting code can be packed.
*/
mir_foreach_src(ins, s) {
unsigned src_size = nir_alu_type_get_type_size(ins->src_types[s]);
if (src_size == 16 && ins->src[s] < SSA_FIXED_MINIMUM)
min_bound[ins->src[s]] = MAX2(min_bound[ins->src[s]], 8);
}
/* Everything after this concerns only the destination, not the
* sources.
*/
if (ins->dest >= SSA_FIXED_MINIMUM) continue;
unsigned size = nir_alu_type_get_type_size(ins->dest_type);
@@ -606,12 +618,6 @@ allocate_registers(compiler_context *ctx, bool *spilled)
if (size == 16 && min_alignment[dest] != 4)
min_bound[dest] = 8;
mir_foreach_src(ins, s) {
unsigned src_size = nir_alu_type_get_type_size(ins->src_types[s]);
if (src_size == 16 && ins->src[s] < SSA_FIXED_MINIMUM)
min_bound[ins->src[s]] = MAX2(min_bound[ins->src[s]], 8);
}
/* We don't have a swizzle for the conditional and we don't
* want to muck with the conditional itself, so just force
* alignment for now */