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radv: cleanup uses of VK_PIPELINE_CREATE_DISABLE_OPTIMIZATION_BIT

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Use the pipeline key instead of this mess.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13067>
This commit is contained in:
Samuel Pitoiset
2021-09-27 19:19:36 +02:00
parent 7188e7c87d
commit 82193fa58c
5 changed files with 18 additions and 23 deletions
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6
src/amd/compiler/aco_interface.cpp
View File

@@ -107,7 +107,7 @@ aco_compile_shader(unsigned shader_count, struct nir_shader* const* shaders,
validate(program.get());
/* Optimization */
if (!args->options->disable_optimizations) {
if (!args->options->key.optimisations_disabled) {
if (!(aco::debug_flags & aco::DEBUG_NO_VN))
aco::value_numbering(program.get());
if (!(aco::debug_flags & aco::DEBUG_NO_OPT))
@@ -147,7 +147,7 @@ aco_compile_shader(unsigned shader_count, struct nir_shader* const* shaders,
aco_print_program(program.get(), stderr, live_vars, aco::print_live_vars | aco::print_kill);
if (!args->is_trap_handler_shader) {
if (!args->options->disable_optimizations && !(aco::debug_flags & aco::DEBUG_NO_SCHED))
if (!args->options->key.optimisations_disabled && !(aco::debug_flags & aco::DEBUG_NO_SCHED))
aco::schedule_program(program.get(), live_vars);
validate(program.get());
@@ -164,7 +164,7 @@ aco_compile_shader(unsigned shader_count, struct nir_shader* const* shaders,
validate(program.get());
/* Optimization */
if (!args->options->disable_optimizations && !(aco::debug_flags & aco::DEBUG_NO_OPT)) {
if (!args->options->key.optimisations_disabled && !(aco::debug_flags & aco::DEBUG_NO_OPT)) {
aco::optimize_postRA(program.get());
validate(program.get());
}

15
src/amd/vulkan/radv_pipeline.c
View File

@@ -3334,7 +3334,6 @@ radv_create_shaders(struct radv_pipeline *pipeline, struct radv_device *device,
bool keep_statistic_info = (flags & VK_PIPELINE_CREATE_CAPTURE_STATISTICS_BIT_KHR) ||
(device->instance->debug_flags & RADV_DEBUG_DUMP_SHADER_STATS) ||
device->keep_shader_info;
bool disable_optimizations = flags & VK_PIPELINE_CREATE_DISABLE_OPTIMIZATION_BIT;
struct radv_pipeline_shader_stack_size **stack_sizes =
pipeline->type == RADV_PIPELINE_COMPUTE ? &pipeline->compute.rt_stack_sizes : NULL;
uint32_t *num_stack_sizes = stack_sizes ? &pipeline->compute.group_count : NULL;
@@ -3402,7 +3401,7 @@ radv_create_shaders(struct radv_pipeline *pipeline, struct radv_device *device,
radv_start_feedback(stage_feedbacks[i]);
nir[i] = radv_shader_compile_to_nir(device, modules[i], stage ? stage->pName : "main", i,
stage ? stage->pSpecializationInfo : NULL, flags,
stage ? stage->pSpecializationInfo : NULL,
pipeline->layout, pipeline_key);
/* We don't want to alter meta shaders IR directly so clone it
@@ -3415,7 +3414,7 @@ radv_create_shaders(struct radv_pipeline *pipeline, struct radv_device *device,
radv_stop_feedback(stage_feedbacks[i], false);
}
bool optimize_conservatively = flags & VK_PIPELINE_CREATE_DISABLE_OPTIMIZATION_BIT;
bool optimize_conservatively = pipeline_key->optimisations_disabled;
radv_link_shaders(pipeline, pipeline_key, nir, optimize_conservatively);
radv_set_driver_locations(pipeline, nir, infos);
@@ -3594,7 +3593,7 @@ radv_create_shaders(struct radv_pipeline *pipeline, struct radv_device *device,
pipeline->gs_copy_shader = radv_create_gs_copy_shader(
device, nir[MESA_SHADER_GEOMETRY], &info, &gs_copy_binary, keep_executable_info,
keep_statistic_info, keys[MESA_SHADER_GEOMETRY].has_multiview_view_index,
disable_optimizations);
pipeline_key->optimisations_disabled);
}
if (!keep_executable_info && pipeline->gs_copy_shader) {
@@ -3619,7 +3618,7 @@ radv_create_shaders(struct radv_pipeline *pipeline, struct radv_device *device,
pipeline->shaders[MESA_SHADER_FRAGMENT] = radv_shader_variant_compile(
device, modules[MESA_SHADER_FRAGMENT], &nir[MESA_SHADER_FRAGMENT], 1, pipeline->layout,
pipeline_key, infos + MESA_SHADER_FRAGMENT, keep_executable_info,
keep_statistic_info, disable_optimizations, &binaries[MESA_SHADER_FRAGMENT]);
keep_statistic_info, &binaries[MESA_SHADER_FRAGMENT]);
radv_stop_feedback(stage_feedbacks[MESA_SHADER_FRAGMENT], false);
}
@@ -3636,7 +3635,7 @@ radv_create_shaders(struct radv_pipeline *pipeline, struct radv_device *device,
pipeline->shaders[MESA_SHADER_TESS_CTRL] = radv_shader_variant_compile(
device, modules[MESA_SHADER_TESS_CTRL], combined_nir, 2, pipeline->layout, pipeline_key,
&infos[MESA_SHADER_TESS_CTRL], keep_executable_info, keep_statistic_info,
disable_optimizations, &binaries[MESA_SHADER_TESS_CTRL]);
&binaries[MESA_SHADER_TESS_CTRL]);
radv_stop_feedback(stage_feedbacks[MESA_SHADER_TESS_CTRL], false);
}
@@ -3654,7 +3653,7 @@ radv_create_shaders(struct radv_pipeline *pipeline, struct radv_device *device,
pipeline->shaders[MESA_SHADER_GEOMETRY] = radv_shader_variant_compile(
device, modules[MESA_SHADER_GEOMETRY], combined_nir, 2, pipeline->layout, pipeline_key,
&infos[MESA_SHADER_GEOMETRY], keep_executable_info,
keep_statistic_info, disable_optimizations, &binaries[MESA_SHADER_GEOMETRY]);
keep_statistic_info, &binaries[MESA_SHADER_GEOMETRY]);
radv_stop_feedback(stage_feedbacks[MESA_SHADER_GEOMETRY], false);
}
@@ -3667,7 +3666,7 @@ radv_create_shaders(struct radv_pipeline *pipeline, struct radv_device *device,
pipeline->shaders[i] = radv_shader_variant_compile(
device, modules[i], &nir[i], 1, pipeline->layout, pipeline_key, infos + i,
keep_executable_info, keep_statistic_info, disable_optimizations, &binaries[i]);
keep_executable_info, keep_statistic_info, &binaries[i]);
radv_stop_feedback(stage_feedbacks[i], false);
}

4
src/amd/vulkan/radv_pipeline_rt.c
View File

@@ -862,7 +862,7 @@ parse_rt_stage(struct radv_device *device, struct radv_pipeline_layout *layout,
nir_shader *shader = radv_shader_compile_to_nir(
device, vk_shader_module_from_handle(stage->module), stage->pName,
convert_rt_stage(stage->stage), stage->pSpecializationInfo, 0, layout, &key);
convert_rt_stage(stage->stage), stage->pSpecializationInfo, layout, &key);
if (shader->info.stage == MESA_SHADER_RAYGEN || shader->info.stage == MESA_SHADER_CLOSEST_HIT ||
shader->info.stage == MESA_SHADER_CALLABLE || shader->info.stage == MESA_SHADER_MISS) {
@@ -2058,4 +2058,4 @@ radv_GetRayTracingShaderGroupStackSizeKHR(VkDevice device, VkPipeline _pipeline,
return stack_size->non_recursive_size;
else
return stack_size->recursive_size;
}
}

12
src/amd/vulkan/radv_shader.c
View File

@@ -413,7 +413,7 @@ radv_lower_primitive_shading_rate(nir_shader *nir)
nir_shader *
radv_shader_compile_to_nir(struct radv_device *device, struct vk_shader_module *module,
const char *entrypoint_name, gl_shader_stage stage,
const VkSpecializationInfo *spec_info, const VkPipelineCreateFlags flags,
const VkSpecializationInfo *spec_info,
const struct radv_pipeline_layout *layout,
const struct radv_pipeline_key *key)
{
@@ -674,7 +674,7 @@ radv_shader_compile_to_nir(struct radv_device *device, struct vk_shader_module *
nir_lower_load_const_to_scalar(nir);
if (!(flags & VK_PIPELINE_CREATE_DISABLE_OPTIMIZATION_BIT))
if (!key->optimisations_disabled)
radv_optimize_nir(device, nir, false, true);
/* call radv_nir_lower_ycbcr_textures() late as there might still be
@@ -743,8 +743,7 @@ radv_shader_compile_to_nir(struct radv_device *device, struct vk_shader_module *
* considered too large for unrolling.
*/
if (ac_nir_lower_indirect_derefs(nir, device->physical_device->rad_info.chip_class) &&
!(flags & VK_PIPELINE_CREATE_DISABLE_OPTIMIZATION_BIT) &&
nir->info.stage != MESA_SHADER_COMPUTE) {
!key->optimisations_disabled && nir->info.stage != MESA_SHADER_COMPUTE) {
/* Optimize the lowered code before the linking optimizations. */
radv_optimize_nir(device, nir, false, false);
}
@@ -1635,7 +1634,7 @@ radv_shader_variant_compile(struct radv_device *device, struct vk_shader_module
struct radv_pipeline_layout *layout,
const struct radv_pipeline_key *key,
struct radv_shader_info *info, bool keep_shader_info,
bool keep_statistic_info, bool disable_optimizations,
bool keep_statistic_info,
struct radv_shader_binary **binary_out)
{
gl_shader_stage stage = shaders[shader_count - 1]->info.stage;
@@ -1647,7 +1646,6 @@ radv_shader_variant_compile(struct radv_device *device, struct vk_shader_module
options.explicit_scratch_args = !radv_use_llvm_for_stage(device, stage);
options.robust_buffer_access = device->robust_buffer_access;
options.disable_optimizations = disable_optimizations;
options.wgp_mode = radv_should_use_wgp_mode(device, stage, info);
return shader_variant_compile(device, module, shaders, shader_count, stage, info, &options,
@@ -1665,7 +1663,7 @@ radv_create_gs_copy_shader(struct radv_device *device, struct nir_shader *shader
options.explicit_scratch_args = !radv_use_llvm_for_stage(device, stage);
options.key.has_multiview_view_index = multiview;
options.disable_optimizations = disable_optimizations;
options.key.optimisations_disabled = disable_optimizations;
return shader_variant_compile(device, NULL, &shader, 1, stage, info, &options, true, false,
keep_shader_info, keep_statistic_info, binary_out);

4
src/amd/vulkan/radv_shader.h
View File

@@ -172,7 +172,6 @@ struct radv_nir_compiler_options {
bool has_ls_vgpr_init_bug;
bool has_image_load_dcc_bug;
bool enable_mrt_output_nan_fixup;
bool disable_optimizations; /* only used by ACO */
bool wgp_mode;
enum radeon_family family;
enum chip_class chip_class;
@@ -476,7 +475,6 @@ bool radv_nir_lower_ycbcr_textures(nir_shader *shader, const struct radv_pipelin
nir_shader *radv_shader_compile_to_nir(struct radv_device *device, struct vk_shader_module *module,
const char *entrypoint_name, gl_shader_stage stage,
const VkSpecializationInfo *spec_info,
const VkPipelineCreateFlags flags,
const struct radv_pipeline_layout *layout,
const struct radv_pipeline_key *key);
@@ -496,7 +494,7 @@ struct radv_shader_variant *radv_shader_variant_compile(
struct radv_device *device, struct vk_shader_module *module, struct nir_shader *const *shaders,
int shader_count, struct radv_pipeline_layout *layout, const struct radv_pipeline_key *key,
struct radv_shader_info *info, bool keep_shader_info, bool keep_statistic_info,
bool disable_optimizations, struct radv_shader_binary **binary_out);
struct radv_shader_binary **binary_out);
struct radv_shader_variant *
radv_create_gs_copy_shader(struct radv_device *device, struct nir_shader *nir,