intel/blorp: Add an "enabled" bit to surface_info
This gives a slightly smarter way to check whether or not a particular surface exists than looking at the address. Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
This commit is contained in:
@@ -64,6 +64,8 @@ brw_blorp_surface_info_init(struct blorp_context *blorp,
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unsigned int level, unsigned int layer,
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unsigned int level, unsigned int layer,
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enum isl_format format, bool is_render_target)
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enum isl_format format, bool is_render_target)
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{
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{
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info->enabled = true;
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if (format == ISL_FORMAT_UNSUPPORTED)
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if (format == ISL_FORMAT_UNSUPPORTED)
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format = surf->surf->format;
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format = surf->surf->format;
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@@ -513,7 +513,7 @@ blorp_emit_ps_config(struct blorp_batch *batch,
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blorp_emit(batch, GENX(3DSTATE_WM), wm);
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blorp_emit(batch, GENX(3DSTATE_WM), wm);
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blorp_emit(batch, GENX(3DSTATE_PS), ps) {
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blorp_emit(batch, GENX(3DSTATE_PS), ps) {
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if (params->src.addr.buffer) {
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if (params->src.enabled) {
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ps.SamplerCount = 1; /* Up to 4 samplers */
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ps.SamplerCount = 1; /* Up to 4 samplers */
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ps.BindingTableEntryCount = 2;
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ps.BindingTableEntryCount = 2;
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} else {
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} else {
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@@ -569,7 +569,7 @@ blorp_emit_ps_config(struct blorp_batch *batch,
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blorp_emit(batch, GENX(3DSTATE_PS_EXTRA), psx) {
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blorp_emit(batch, GENX(3DSTATE_PS_EXTRA), psx) {
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psx.PixelShaderValid = true;
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psx.PixelShaderValid = true;
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if (params->src.addr.buffer)
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if (params->src.enabled)
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psx.PixelShaderKillsPixel = true;
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psx.PixelShaderKillsPixel = true;
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psx.AttributeEnable = prog_data->num_varying_inputs > 0;
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psx.AttributeEnable = prog_data->num_varying_inputs > 0;
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@@ -600,7 +600,7 @@ blorp_emit_ps_config(struct blorp_batch *batch,
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if (prog_data)
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if (prog_data)
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wm.ThreadDispatchEnable = true;
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wm.ThreadDispatchEnable = true;
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if (params->src.addr.buffer)
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if (params->src.enabled)
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wm.PixelShaderKillPixel = true;
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wm.PixelShaderKillPixel = true;
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if (params->dst.surf.samples > 1) {
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if (params->dst.surf.samples > 1) {
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@@ -643,7 +643,7 @@ blorp_emit_ps_config(struct blorp_batch *batch,
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ps._16PixelDispatchEnable = true;
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ps._16PixelDispatchEnable = true;
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}
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}
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if (params->src.addr.buffer)
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if (params->src.enabled)
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ps.SamplerCount = 1; /* Up to 4 samplers */
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ps.SamplerCount = 1; /* Up to 4 samplers */
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switch (params->fast_clear_op) {
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switch (params->fast_clear_op) {
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@@ -700,7 +700,7 @@ blorp_emit_ps_config(struct blorp_batch *batch,
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wm.NumberofSFOutputAttributes = prog_data->num_varying_inputs;
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wm.NumberofSFOutputAttributes = prog_data->num_varying_inputs;
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}
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}
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if (params->src.addr.buffer) {
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if (params->src.enabled) {
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wm.SamplerCount = 1; /* Up to 4 samplers */
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wm.SamplerCount = 1; /* Up to 4 samplers */
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wm.PixelShaderKillPixel = true; /* TODO: temporarily smash on */
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wm.PixelShaderKillPixel = true; /* TODO: temporarily smash on */
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}
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}
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@@ -750,15 +750,15 @@ blorp_emit_depth_stencil_config(struct blorp_batch *batch,
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blorp_emit(batch, GENX(3DSTATE_DEPTH_BUFFER), db) {
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blorp_emit(batch, GENX(3DSTATE_DEPTH_BUFFER), db) {
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#if GEN_GEN >= 7
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#if GEN_GEN >= 7
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db.DepthWriteEnable = params->depth.addr.buffer != NULL;
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db.DepthWriteEnable = params->depth.enabled;
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db.StencilWriteEnable = params->stencil.addr.buffer != NULL;
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db.StencilWriteEnable = params->stencil.enabled;
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#endif
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#endif
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#if GEN_GEN <= 6
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#if GEN_GEN <= 6
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db.SeparateStencilBufferEnable = true;
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db.SeparateStencilBufferEnable = true;
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#endif
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#endif
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if (params->depth.addr.buffer) {
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if (params->depth.enabled) {
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db.SurfaceFormat = params->depth_format;
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db.SurfaceFormat = params->depth_format;
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db.SurfaceType = isl_to_gen_ds_surftype[params->depth.surf.dim];
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db.SurfaceType = isl_to_gen_ds_surftype[params->depth.surf.dim];
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@@ -787,7 +787,7 @@ blorp_emit_depth_stencil_config(struct blorp_batch *batch,
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db.SurfaceBaseAddress = params->depth.addr;
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db.SurfaceBaseAddress = params->depth.addr;
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db.DepthBufferMOCS = mocs;
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db.DepthBufferMOCS = mocs;
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} else if (params->stencil.addr.buffer) {
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} else if (params->stencil.enabled) {
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db.SurfaceFormat = D32_FLOAT;
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db.SurfaceFormat = D32_FLOAT;
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db.SurfaceType = isl_to_gen_ds_surftype[params->stencil.surf.dim];
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db.SurfaceType = isl_to_gen_ds_surftype[params->stencil.surf.dim];
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@@ -817,7 +817,7 @@ blorp_emit_depth_stencil_config(struct blorp_batch *batch,
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}
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}
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blorp_emit(batch, GENX(3DSTATE_STENCIL_BUFFER), sb) {
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blorp_emit(batch, GENX(3DSTATE_STENCIL_BUFFER), sb) {
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if (params->stencil.addr.buffer) {
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if (params->stencil.enabled) {
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#if GEN_GEN >= 8 || GEN_IS_HASWELL
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#if GEN_GEN >= 8 || GEN_IS_HASWELL
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sb.StencilBufferEnable = true;
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sb.StencilBufferEnable = true;
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#endif
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#endif
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@@ -927,7 +927,7 @@ blorp_emit_depth_stencil_state(struct blorp_batch *batch,
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struct GENX(DEPTH_STENCIL_STATE) ds = { 0 };
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struct GENX(DEPTH_STENCIL_STATE) ds = { 0 };
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#endif
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#endif
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if (params->depth.addr.buffer) {
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if (params->depth.enabled) {
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ds.DepthBufferWriteEnable = true;
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ds.DepthBufferWriteEnable = true;
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switch (params->hiz_op) {
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switch (params->hiz_op) {
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@@ -953,7 +953,7 @@ blorp_emit_depth_stencil_state(struct blorp_batch *batch,
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}
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}
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}
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}
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if (params->stencil.addr.buffer) {
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if (params->stencil.enabled) {
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ds.StencilBufferWriteEnable = true;
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ds.StencilBufferWriteEnable = true;
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ds.StencilTestEnable = true;
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ds.StencilTestEnable = true;
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ds.DoubleSidedStencilEnable = false;
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ds.DoubleSidedStencilEnable = false;
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@@ -1056,14 +1056,14 @@ blorp_emit_surface_states(struct blorp_batch *batch,
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const unsigned ss_size = GENX(RENDER_SURFACE_STATE_length) * 4;
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const unsigned ss_size = GENX(RENDER_SURFACE_STATE_length) * 4;
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const unsigned ss_align = GENX(RENDER_SURFACE_STATE_length) > 8 ? 64 : 32;
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const unsigned ss_align = GENX(RENDER_SURFACE_STATE_length) > 8 ? 64 : 32;
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unsigned num_surfaces = 1 + (params->src.addr.buffer != NULL);
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unsigned num_surfaces = 1 + params->src.enabled;
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blorp_alloc_binding_table(batch, num_surfaces, ss_size, ss_align,
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blorp_alloc_binding_table(batch, num_surfaces, ss_size, ss_align,
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&bind_offset, surface_offsets, surface_maps);
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&bind_offset, surface_offsets, surface_maps);
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blorp_emit_surface_state(batch, ¶ms->dst,
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blorp_emit_surface_state(batch, ¶ms->dst,
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surface_maps[BLORP_RENDERBUFFER_BT_INDEX],
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surface_maps[BLORP_RENDERBUFFER_BT_INDEX],
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surface_offsets[BLORP_RENDERBUFFER_BT_INDEX], true);
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surface_offsets[BLORP_RENDERBUFFER_BT_INDEX], true);
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if (params->src.addr.buffer) {
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if (params->src.enabled) {
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blorp_emit_surface_state(batch, ¶ms->src,
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blorp_emit_surface_state(batch, ¶ms->src,
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surface_maps[BLORP_TEXTURE_BT_INDEX],
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surface_maps[BLORP_TEXTURE_BT_INDEX],
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surface_offsets[BLORP_TEXTURE_BT_INDEX], false);
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surface_offsets[BLORP_TEXTURE_BT_INDEX], false);
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@@ -1261,7 +1261,7 @@ blorp_exec(struct blorp_batch *batch, const struct blorp_params *params)
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if (params->wm_prog_data)
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if (params->wm_prog_data)
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blorp_emit_surface_states(batch, params);
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blorp_emit_surface_states(batch, params);
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if (params->src.addr.buffer)
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if (params->src.enabled)
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blorp_emit_sampler_state(batch, params);
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blorp_emit_sampler_state(batch, params);
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blorp_emit_3dstate_multisample(batch, params);
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blorp_emit_3dstate_multisample(batch, params);
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@@ -53,6 +53,8 @@ enum blorp_fast_clear_op {
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struct brw_blorp_surface_info
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struct brw_blorp_surface_info
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{
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{
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bool enabled;
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struct isl_surf surf;
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struct isl_surf surf;
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struct blorp_address addr;
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struct blorp_address addr;
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