diff --git a/src/gallium/drivers/r600/evergreen_state.c b/src/gallium/drivers/r600/evergreen_state.c index 47b386a599a..d29cde01fe9 100644 --- a/src/gallium/drivers/r600/evergreen_state.c +++ b/src/gallium/drivers/r600/evergreen_state.c @@ -2142,7 +2142,7 @@ static void evergreen_emit_vertex_buffers(struct r600_context *rctx, radeon_emit(cs, PKT3(PKT3_SET_RESOURCE, 8, 0) | pkt_flags); radeon_emit(cs, (resource_offset + buffer_index) * 8); radeon_emit(cs, va); /* RESOURCEi_WORD0 */ - radeon_emit(cs, rbuffer->b.b.width0 - vb->buffer_offset - 1); /* RESOURCEi_WORD1 */ + radeon_emit(cs, rbuffer->b.b.width0 - vb->buffer_offset - 1 + shader->width_correction[buffer_index]); /* RESOURCEi_WORD1 */ radeon_emit(cs, /* RESOURCEi_WORD2 */ S_030008_ENDIAN_SWAP(r600_endian_swap(32)) | S_030008_STRIDE(stride) | diff --git a/src/gallium/drivers/r600/r600_pipe.h b/src/gallium/drivers/r600/r600_pipe.h index f8e710b9c53..78fd865dc5f 100644 --- a/src/gallium/drivers/r600/r600_pipe.h +++ b/src/gallium/drivers/r600/r600_pipe.h @@ -417,6 +417,7 @@ struct r600_fetch_shader { unsigned offset; uint32_t buffer_mask; unsigned strides[PIPE_MAX_ATTRIBS]; + uint8_t width_correction[PIPE_MAX_ATTRIBS]; }; struct r600_shader_state { diff --git a/src/gallium/drivers/r600/r600_shader.c b/src/gallium/drivers/r600/r600_shader.c index 154b3dba3a3..302dacb383e 100644 --- a/src/gallium/drivers/r600/r600_shader.c +++ b/src/gallium/drivers/r600/r600_shader.c @@ -436,6 +436,17 @@ void *r600_create_vertex_fetch_shader(struct pipe_context *ctx, if (unlikely(r = r600_bytecode_add_vtx(&bc, &vtx))) goto fail; + + if (unlikely(rctx->b.gfx_level >= EVERGREEN && + desc->nr_channels == 3 && + (format == FMT_8_8_8_8 || + format == FMT_16_16_16_16 || + format == FMT_16_16_16_16_FLOAT))) { + if (format == FMT_8_8_8_8) + shader->width_correction[elements[i].vertex_buffer_index] = 4 - 3; + else + shader->width_correction[elements[i].vertex_buffer_index] = 8 - 6; + } } r600_bytecode_add_cfinst(&bc, CF_OP_RET);