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radeonsi/vcn: support DPB_MAX_RES on VCN5

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Use common db_alignment to calculate dpb_size for DPB_MAX_RES,
DPB_DYNAMIC_TIER_1 and DPB_DYNAMIC_TIER_2. This makes the db_pitch
in sync with all DPB types.

Remove the VCN5 hack of using 256 for H264 as 64 works.
Remove redundant codes for width and height as they were calculated
at the beginning in calc_dpb_size().

Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: David (Ming Qiang) Wu <David.Wu3@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30186>
This commit is contained in:
David (Ming Qiang) Wu
2024-07-15 11:52:19 -04:00
committed by Marge Bot
parent e040ee1098
commit 8177a4f72a
1 changed files with 20 additions and 18 deletions
Download Patch File Download Diff File Expand all files Collapse all files

38
src/gallium/drivers/radeonsi/radeon_vcn_dec.c
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@@ -1972,9 +1972,12 @@ static struct pb_buffer_lean *rvcn_dec_message_decode(struct radeon_decoder *dec
if (dec->ctx.res)
decode->hw_ctxt_size = dec->ctx.res->buf->size;
if (dec->dpb_type == DPB_DYNAMIC_TIER_2)
if (dec->dpb_type == DPB_DYNAMIC_TIER_2) {
if (rvcn_dec_dynamic_dpb_t2_message(dec, decode, dynamic_dpb_t2, encrypted))
return NULL;
} else if (((struct si_screen *)dec->screen)->info.vcn_ip_version == VCN_5_0_0 &&
dec->dpb_type == DPB_MAX_RES)
decode->db_swizzle_mode = RDECODE_VCN5_256B_D;
return luma->buffer.buf;
}
@@ -2239,7 +2242,7 @@ static unsigned calc_dpb_size(struct radeon_decoder *dec)
unsigned max_references = dec->base.max_references + 1;
// aligned size of a single frame
image_size = align(width, 32) * height;
image_size = align(width, dec->db_alignment) * align(height, dec->db_alignment);
image_size += image_size / 2;
image_size = align(image_size, 1024);
@@ -2290,12 +2293,12 @@ static unsigned calc_dpb_size(struct radeon_decoder *dec)
else
max_references = MAX2(max_references, 17);
width = align(width, 16);
height = align(height, 16);
if (dec->base.profile == PIPE_VIDEO_PROFILE_HEVC_MAIN_10)
dpb_size = align((align(width, 64) * align(height, 64) * 9) / 4, 256) * max_references;
dpb_size = align((align(width, dec->db_alignment) *
align(height, dec->db_alignment) * 9) / 4, 256) * max_references;
else
dpb_size = align((align(width, 32) * height * 3) / 2, 256) * max_references;
dpb_size = align((align(width, dec->db_alignment) *
align(height, dec->db_alignment) * 3) / 2, 256) * max_references;
break;
case PIPE_VIDEO_FORMAT_VC1:
@@ -2874,12 +2877,21 @@ struct pipe_video_codec *radeon_create_decoder(struct pipe_context *context,
else
dec->dpb_type = DPB_MAX_RES;
dec->db_alignment = (((struct si_screen *)dec->screen)->info.vcn_ip_version >= VCN_2_0_0 &&
dec->db_alignment = (sctx->vcn_ip_ver >= VCN_2_0_0 &&
dec->base.width > 32 && (dec->stream_type == RDECODE_CODEC_VP9 ||
dec->stream_type == RDECODE_CODEC_AV1 ||
dec->base.profile == PIPE_VIDEO_PROFILE_HEVC_MAIN_10)) ? 64 : 32;
dec->dpb_size = calc_dpb_size(dec);
if (sctx->vcn_ip_ver >= VCN_5_0_0) {
if (stream_type == RDECODE_CODEC_VP9 ||
stream_type == RDECODE_CODEC_AV1 ||
stream_type == RDECODE_CODEC_H265 ||
stream_type == RDECODE_CODEC_H264_PERF)
dec->db_alignment = 64;
}
if (dec->dpb_type != DPB_DYNAMIC_TIER_2)
dec->dpb_size = calc_dpb_size(dec);
if (!si_vid_create_buffer(dec->screen, &dec->sessionctx, RDECODE_SESSION_CONTEXT_SIZE,
PIPE_USAGE_DEFAULT)) {
@@ -2950,16 +2962,6 @@ struct pipe_video_codec *radeon_create_decoder(struct pipe_context *context,
goto error;
}
/* hack for vcn 5 temporarily */
if (sctx->vcn_ip_ver >= VCN_5_0_0) {
if (stream_type == RDECODE_CODEC_VP9 ||
stream_type == RDECODE_CODEC_AV1 ||
stream_type == RDECODE_CODEC_H265)
dec->db_alignment = 64;
else if(stream_type == RDECODE_CODEC_H264_PERF)
dec->db_alignment = 256;
}
if (dec->stream_type != RDECODE_CODEC_JPEG) {
map_msg_fb_it_probs_buf(dec);
rvcn_dec_message_create(dec);