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r600: add support for LDS instruction encoding.

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These are used in tessellation shaders to read/write values
between VS/TCS/TES.

This splits the eg alu assembler out to handle these
instructions.

Signed-off-by: Dave Airlie <airlied@redhat.com>
This commit is contained in:
Dave Airlie
2015-11-30 10:07:44 +10:00
parent fe4eb49df9
commit 816bb30245
4 changed files with 144 additions and 2 deletions
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28
src/gallium/drivers/r600/r600_asm.c
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@@ -1714,10 +1714,12 @@ int r600_bytecode_build(struct r600_bytecode *bc)
r = r600_bytecode_alu_build(bc, alu, addr);
break;
case R700:
case EVERGREEN: /* eg alu is same encoding as r700 */
case CAYMAN:
r = r700_bytecode_alu_build(bc, alu, addr);
break;
case EVERGREEN:
case CAYMAN:
r = eg_bytecode_alu_build(bc, alu, addr);
break;
default:
R600_ERR("unknown chip class %d.\n", bc->chip_class);
return -EINVAL;
@@ -1904,6 +1906,28 @@ static int print_src(struct r600_bytecode_alu *alu, unsigned idx)
need_sel = 0;
need_chan = 0;
switch (sel) {
case EG_V_SQ_ALU_SRC_LDS_DIRECT_A:
o += fprintf(stderr, "LDS_A[0x%08X]", src->value);
break;
case EG_V_SQ_ALU_SRC_LDS_DIRECT_B:
o += fprintf(stderr, "LDS_B[0x%08X]", src->value);
break;
case EG_V_SQ_ALU_SRC_LDS_OQ_A:
o += fprintf(stderr, "LDS_OQ_A");
need_chan = 1;
break;
case EG_V_SQ_ALU_SRC_LDS_OQ_B:
o += fprintf(stderr, "LDS_OQ_B");
need_chan = 1;
break;
case EG_V_SQ_ALU_SRC_LDS_OQ_A_POP:
o += fprintf(stderr, "LDS_OQ_A_POP");
need_chan = 1;
break;
case EG_V_SQ_ALU_SRC_LDS_OQ_B_POP:
o += fprintf(stderr, "LDS_OQ_B_POP");
need_chan = 1;
break;
case V_SQ_ALU_SRC_PS:
o += fprintf(stderr, "PS");
break;