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radeonsi: remove TGSI from comments

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Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
This commit is contained in:
Marek Olšák
2020-01-10 16:57:17 -05:00
parent b1badf4ad6
commit 7f4a54d5bd
4 changed files with 9 additions and 11 deletions
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2
src/gallium/drivers/radeonsi/si_pipe.h
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@@ -586,7 +586,7 @@ struct si_screen {
* *
* Design & limitations: * Design & limitations:
* - The shader cache is per screen (= per process), never saved to * - The shader cache is per screen (= per process), never saved to
* disk, and skips redundant shader compilations from TGSI to bytecode. * disk, and skips redundant shader compilations from NIR to bytecode.
* - It can only be used with one-variant-per-shader support, in which * - It can only be used with one-variant-per-shader support, in which
* case only the main (typically middle) part of shaders is cached. * case only the main (typically middle) part of shaders is cached.
* - Only VS, TCS, TES, PS are cached, out of which only the hw VS * - Only VS, TCS, TES, PS are cached, out of which only the hw VS

10
src/gallium/drivers/radeonsi/si_shader.c
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@@ -687,7 +687,6 @@ static LLVMValueRef get_tcs_tes_buffer_address(struct si_shader_context *ctx,
return base_addr; return base_addr;
} }
/* This is a generic helper that can be shared by the NIR and TGSI backends */
static LLVMValueRef get_tcs_tes_buffer_address_from_generic_indices( static LLVMValueRef get_tcs_tes_buffer_address_from_generic_indices(
struct si_shader_context *ctx, struct si_shader_context *ctx,
LLVMValueRef vertex_index, LLVMValueRef vertex_index,
@@ -969,8 +968,7 @@ LLVMValueRef si_nir_load_input_tes(struct ac_shader_abi *abi,
/* TODO: This will generate rather ordinary llvm code, although it /* TODO: This will generate rather ordinary llvm code, although it
* should be easy for the optimiser to fix up. In future we might want * should be easy for the optimiser to fix up. In future we might want
* to refactor buffer_load(), but for now this maximises code sharing * to refactor buffer_load().
* between the NIR and TGSI backends.
*/ */
LLVMValueRef value[4]; LLVMValueRef value[4];
for (unsigned i = 0; i < num_components; i++) { for (unsigned i = 0; i < num_components; i++) {
@@ -2410,7 +2408,7 @@ static void si_write_tess_factors(struct si_shader_context *ctx,
if (shader->key.part.tcs.epilog.prim_mode == PIPE_PRIM_LINES) { if (shader->key.part.tcs.epilog.prim_mode == PIPE_PRIM_LINES) {
/* For isolines, the hardware expects tess factors in the /* For isolines, the hardware expects tess factors in the
* reverse order from what GLSL / TGSI specify. * reverse order from what NIR specifies.
*/ */
LLVMValueRef tmp = out[0]; LLVMValueRef tmp = out[0];
out[0] = out[1]; out[0] = out[1];
@@ -5759,7 +5757,7 @@ int si_compile_shader(struct si_screen *sscreen,
struct nir_shader *nir = get_nir_shader(sel, &free_nir); struct nir_shader *nir = get_nir_shader(sel, &free_nir);
int r = -1; int r = -1;
/* Dump TGSI code before doing TGSI->LLVM conversion in case the /* Dump NIR before doing NIR->LLVM conversion in case the
* conversion fails. */ * conversion fails. */
if (si_can_dump_shader(sscreen, sel->type) && if (si_can_dump_shader(sscreen, sel->type) &&
!(sscreen->debug_flags & DBG(NO_NIR))) { !(sscreen->debug_flags & DBG(NO_NIR))) {
@@ -7103,7 +7101,7 @@ bool si_shader_create(struct si_screen *sscreen, struct ac_llvm_compiler *compil
if (!mainp) if (!mainp)
return false; return false;
/* Copy the compiled TGSI shader data over. */ /* Copy the compiled shader data over. */
shader->is_binary_shared = true; shader->is_binary_shared = true;
shader->binary = mainp->binary; shader->binary = mainp->binary;
shader->config = mainp->config; shader->config = mainp->config;

6
src/gallium/drivers/radeonsi/si_shader.h
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@@ -308,7 +308,7 @@ struct si_compiler_ctx_state {
}; };
/* A shader selector is a gallium CSO and contains shader variants and /* A shader selector is a gallium CSO and contains shader variants and
* binaries for one TGSI program. This can be shared by multiple contexts. * binaries for one NIR program. This can be shared by multiple contexts.
*/ */
struct si_shader_selector { struct si_shader_selector {
struct pipe_reference reference; struct pipe_reference reference;
@@ -320,8 +320,8 @@ struct si_shader_selector {
struct si_shader *first_variant; /* immutable after the first variant */ struct si_shader *first_variant; /* immutable after the first variant */
struct si_shader *last_variant; /* mutable */ struct si_shader *last_variant; /* mutable */
/* The compiled TGSI shader expecting a prolog and/or epilog (not /* The compiled NIR shader without a prolog and/or epilog (not
* uploaded to a buffer). * uploaded to a buffer object).
*/ */
struct si_shader *main_shader_part; struct si_shader *main_shader_part;
struct si_shader *main_shader_part_ls; /* as_ls is set in the key */ struct si_shader *main_shader_part_ls; /* as_ls is set in the key */

2
src/gallium/drivers/radeonsi/si_shader_llvm.c
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@@ -149,7 +149,7 @@ void si_llvm_context_init(struct si_shader_context *ctx,
ctx->i1true = LLVMConstInt(ctx->i1, 1, 0); ctx->i1true = LLVMConstInt(ctx->i1, 1, 0);
} }
/* Set the context to a certain TGSI shader. Can be called repeatedly /* Set the context to a certain shader. Can be called repeatedly
* to change the shader. */ * to change the shader. */
void si_llvm_context_set_ir(struct si_shader_context *ctx, void si_llvm_context_set_ir(struct si_shader_context *ctx,
struct si_shader *shader) struct si_shader *shader)