radeonsi: remove TGSI from comments
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
This commit is contained in:
@@ -586,7 +586,7 @@ struct si_screen {
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*
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* Design & limitations:
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* - The shader cache is per screen (= per process), never saved to
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* disk, and skips redundant shader compilations from TGSI to bytecode.
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* disk, and skips redundant shader compilations from NIR to bytecode.
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* - It can only be used with one-variant-per-shader support, in which
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* case only the main (typically middle) part of shaders is cached.
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* - Only VS, TCS, TES, PS are cached, out of which only the hw VS
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@@ -687,7 +687,6 @@ static LLVMValueRef get_tcs_tes_buffer_address(struct si_shader_context *ctx,
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return base_addr;
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}
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/* This is a generic helper that can be shared by the NIR and TGSI backends */
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static LLVMValueRef get_tcs_tes_buffer_address_from_generic_indices(
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struct si_shader_context *ctx,
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LLVMValueRef vertex_index,
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@@ -969,8 +968,7 @@ LLVMValueRef si_nir_load_input_tes(struct ac_shader_abi *abi,
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/* TODO: This will generate rather ordinary llvm code, although it
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* should be easy for the optimiser to fix up. In future we might want
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* to refactor buffer_load(), but for now this maximises code sharing
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* between the NIR and TGSI backends.
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* to refactor buffer_load().
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*/
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LLVMValueRef value[4];
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for (unsigned i = 0; i < num_components; i++) {
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@@ -2410,7 +2408,7 @@ static void si_write_tess_factors(struct si_shader_context *ctx,
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if (shader->key.part.tcs.epilog.prim_mode == PIPE_PRIM_LINES) {
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/* For isolines, the hardware expects tess factors in the
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* reverse order from what GLSL / TGSI specify.
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* reverse order from what NIR specifies.
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*/
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LLVMValueRef tmp = out[0];
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out[0] = out[1];
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@@ -5759,7 +5757,7 @@ int si_compile_shader(struct si_screen *sscreen,
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struct nir_shader *nir = get_nir_shader(sel, &free_nir);
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int r = -1;
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/* Dump TGSI code before doing TGSI->LLVM conversion in case the
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/* Dump NIR before doing NIR->LLVM conversion in case the
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* conversion fails. */
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if (si_can_dump_shader(sscreen, sel->type) &&
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!(sscreen->debug_flags & DBG(NO_NIR))) {
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@@ -7103,7 +7101,7 @@ bool si_shader_create(struct si_screen *sscreen, struct ac_llvm_compiler *compil
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if (!mainp)
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return false;
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/* Copy the compiled TGSI shader data over. */
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/* Copy the compiled shader data over. */
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shader->is_binary_shared = true;
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shader->binary = mainp->binary;
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shader->config = mainp->config;
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@@ -308,7 +308,7 @@ struct si_compiler_ctx_state {
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};
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/* A shader selector is a gallium CSO and contains shader variants and
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* binaries for one TGSI program. This can be shared by multiple contexts.
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* binaries for one NIR program. This can be shared by multiple contexts.
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*/
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struct si_shader_selector {
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struct pipe_reference reference;
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@@ -320,8 +320,8 @@ struct si_shader_selector {
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struct si_shader *first_variant; /* immutable after the first variant */
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struct si_shader *last_variant; /* mutable */
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/* The compiled TGSI shader expecting a prolog and/or epilog (not
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* uploaded to a buffer).
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/* The compiled NIR shader without a prolog and/or epilog (not
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* uploaded to a buffer object).
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*/
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struct si_shader *main_shader_part;
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struct si_shader *main_shader_part_ls; /* as_ls is set in the key */
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@@ -149,7 +149,7 @@ void si_llvm_context_init(struct si_shader_context *ctx,
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ctx->i1true = LLVMConstInt(ctx->i1, 1, 0);
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}
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/* Set the context to a certain TGSI shader. Can be called repeatedly
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/* Set the context to a certain shader. Can be called repeatedly
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* to change the shader. */
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void si_llvm_context_set_ir(struct si_shader_context *ctx,
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struct si_shader *shader)
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