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intel/compiler: simplify reading of gl_NumWorkGroups in task/mesh

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Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22334>
This commit is contained in:
Marcin Ślusarz
2023-04-05 12:16:33 +02:00
committed by Marge Bot
parent 1ac1d5d62e
commit 7ed9ec70c0
2 changed files with 9 additions and 3 deletions
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6
src/intel/compiler/brw_mesh.cpp
View File

@@ -1563,9 +1563,9 @@ fs_visitor::nir_emit_task_mesh_intrinsic(const fs_builder &bld,
case nir_intrinsic_load_num_workgroups:
assert(!nir->info.mesh.nv);
dest = retype(dest, BRW_REGISTER_TYPE_UD);
bld.SHR(offset(dest, bld, 0), retype(brw_vec1_grf(0, 6), dest.type), brw_imm_ud(16));
bld.AND(offset(dest, bld, 1), retype(brw_vec1_grf(0, 4), dest.type), brw_imm_ud(0xffff));
bld.SHR(offset(dest, bld, 2), retype(brw_vec1_grf(0, 4), dest.type), brw_imm_ud(16));
bld.MOV(offset(dest, bld, 0), brw_uw1_grf(0, 13)); /* g0.6 >> 16 */
bld.MOV(offset(dest, bld, 1), brw_uw1_grf(0, 8)); /* g0.4 & 0xffff */
bld.MOV(offset(dest, bld, 2), brw_uw1_grf(0, 9)); /* g0.4 >> 16 */
break;
case nir_intrinsic_load_workgroup_index:

6
src/intel/compiler/brw_reg.h
View File

@@ -807,6 +807,12 @@ brw_vecn_grf(unsigned width, unsigned nr, unsigned subnr)
}
static inline struct brw_reg
brw_uw1_grf(unsigned nr, unsigned subnr)
{
return brw_uw1_reg(BRW_GENERAL_REGISTER_FILE, nr, subnr);
}
static inline struct brw_reg
brw_uw8_grf(unsigned nr, unsigned subnr)
{