agx: Implement fence_*_to_tex_agx intrinsics
We need these fencing intrinsics because our image caches aren't coherent with memory. Furthermore, we need some sync intrinsics for imageblocks (which are spicy images). These are a stub of what the final fragment shader interlock implementation will look like, or what a real Metal-grade imageblock implementation needs, but this is good enough for handling the sync requirements with spilled render targets. Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24258>
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@@ -1104,6 +1104,40 @@ agx_emit_intrinsic(agx_builder *b, nir_intrinsic_instr *instr)
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return NULL;
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}
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case nir_intrinsic_fence_pbe_to_tex_agx: {
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agx_image_barrier_1(b);
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agx_image_barrier_2(b);
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agx_image_barrier_3(b);
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agx_image_barrier_4(b);
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return NULL;
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}
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case nir_intrinsic_fence_mem_to_tex_agx: {
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/* Flush out the atomic to main memory */
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agx_memory_barrier(b);
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/* Flush out the texture cache */
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agx_flush_memory_to_texture(b);
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return NULL;
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}
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case nir_intrinsic_fence_pbe_to_tex_pixel_agx: {
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agx_image_barrier_1(b);
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agx_image_barrier_2(b);
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agx_flush_memory_to_texture(b);
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agx_image_barrier_3(b);
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return NULL;
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}
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case nir_intrinsic_begin_invocation_interlock: {
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if (!b->shader->did_writeout &&
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!b->shader->key->fs.ignore_tib_dependencies)
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agx_wait_pix(b, 0x000C);
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b->shader->did_writeout = true;
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return NULL;
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}
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case nir_intrinsic_load_barycentric_sample:
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case nir_intrinsic_load_sample_id:
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case nir_intrinsic_load_sample_pos:
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