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intel/compiler: Prevent warnings in the following patch

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The next patch replaces an unsigned bitfield with a plain unsigned,
which triggers gcc to begin warning on signed/unsigned comparisons.

Keeping this patch separate from the actual move allows bisectablity and
generates no additional warnings temporarily.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
This commit is contained in:
Matt Turner
2018-12-10 14:49:49 -08:00
parent 2b801b6668
commit 7e4e9da90d
11 changed files with 38 additions and 36 deletions
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12
src/intel/compiler/brw_vec4_reg_allocate.cpp
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@@ -502,18 +502,18 @@ vec4_visitor::choose_spill_reg(struct ra_graph *g)
}
void
vec4_visitor::spill_reg(int spill_reg_nr)
vec4_visitor::spill_reg(unsigned spill_reg_nr)
{
assert(alloc.sizes[spill_reg_nr] == 1 || alloc.sizes[spill_reg_nr] == 2);
unsigned int spill_offset = last_scratch;
unsigned spill_offset = last_scratch;
last_scratch += alloc.sizes[spill_reg_nr];
/* Generate spill/unspill instructions for the objects being spilled. */
int scratch_reg = -1;
unsigned scratch_reg = ~0u;
foreach_block_and_inst(block, vec4_instruction, inst, cfg) {
for (unsigned int i = 0; i < 3; i++) {
for (unsigned i = 0; i < 3; i++) {
if (inst->src[i].file == VGRF && inst->src[i].nr == spill_reg_nr) {
if (scratch_reg == -1 ||
if (scratch_reg == ~0u ||
!can_use_scratch_for_source(inst, i, scratch_reg)) {
/* We need to unspill anyway so make sure we read the full vec4
* in any case. This way, the cached register can be reused
@@ -529,7 +529,7 @@ vec4_visitor::spill_reg(int spill_reg_nr)
dst_reg(temp), inst->src[i], spill_offset);
temp.offset = inst->src[i].offset;
}
assert(scratch_reg != -1);
assert(scratch_reg != ~0u);
inst->src[i].nr = scratch_reg;
}
}