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intel/compiler: Prevent warnings in the following patch

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The next patch replaces an unsigned bitfield with a plain unsigned,
which triggers gcc to begin warning on signed/unsigned comparisons.

Keeping this patch separate from the actual move allows bisectablity and
generates no additional warnings temporarily.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
This commit is contained in:
Matt Turner
2018-12-10 14:49:49 -08:00
parent 2b801b6668
commit 7e4e9da90d
11 changed files with 38 additions and 36 deletions
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6
src/intel/compiler/brw_schedule_instructions.cpp
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@@ -430,7 +430,7 @@ schedule_node::set_latency_gen7(bool is_haswell)
class instruction_scheduler {
public:
instruction_scheduler(backend_shader *s, int grf_count,
int hw_reg_count, int block_count,
unsigned hw_reg_count, int block_count,
instruction_scheduler_mode mode)
{
this->bs = s;
@@ -511,7 +511,7 @@ public:
bool post_reg_alloc;
int instructions_to_schedule;
int grf_count;
int hw_reg_count;
unsigned hw_reg_count;
int reg_pressure;
int block_idx;
exec_list instructions;
@@ -665,7 +665,7 @@ fs_instruction_scheduler::setup_liveness(cfg_t *cfg)
int payload_last_use_ip[hw_reg_count];
v->calculate_payload_ranges(hw_reg_count, payload_last_use_ip);
for (int i = 0; i < hw_reg_count; i++) {
for (unsigned i = 0; i < hw_reg_count; i++) {
if (payload_last_use_ip[i] == -1)
continue;