anv/pipeline: Remove support for direct-from-nir shaders
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
This commit is contained in:
@@ -57,7 +57,6 @@ VkResult anv_CreateShaderModule(
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if (module == NULL)
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return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
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module->nir = NULL;
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module->size = pCreateInfo->codeSize;
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memcpy(module->data, pCreateInfo->pCode, module->size);
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@@ -100,20 +99,6 @@ anv_shader_compile_to_nir(struct anv_device *device,
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const nir_shader_compiler_options *nir_options =
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compiler->glsl_compiler_options[stage].NirOptions;
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nir_shader *nir;
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nir_function *entry_point;
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if (module->nir) {
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/* Some things such as our meta clear/blit code will give us a NIR
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* shader directly. In that case, we just ignore the SPIR-V entirely
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* and just use the NIR shader */
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nir = module->nir;
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nir->options = nir_options;
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nir_validate_shader(nir);
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assert(exec_list_length(&nir->functions) == 1);
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struct exec_node *node = exec_list_get_head(&nir->functions);
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entry_point = exec_node_data(nir_function, node, node);
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} else {
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uint32_t *spirv = (uint32_t *) module->data;
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assert(spirv[0] == SPIR_V_MAGIC_NUMBER);
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assert(module->size % 4 == 0);
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@@ -133,10 +118,11 @@ anv_shader_compile_to_nir(struct anv_device *device,
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}
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}
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entry_point = spirv_to_nir(spirv, module->size / 4,
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nir_function *entry_point =
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spirv_to_nir(spirv, module->size / 4,
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spec_entries, num_spec_entries,
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stage, entrypoint_name, nir_options);
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nir = entry_point->shader;
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nir_shader *nir = entry_point->shader;
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assert(nir->stage == stage);
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nir_validate_shader(nir);
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@@ -174,7 +160,6 @@ anv_shader_compile_to_nir(struct anv_device *device,
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nir_lower_system_values(nir);
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nir_validate_shader(nir);
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}
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/* Vulkan uses the separate-shader linking model */
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nir->info.separate_shader = true;
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@@ -471,7 +456,6 @@ anv_pipeline_compile_vs(struct anv_pipeline *pipeline,
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void *mem_ctx = ralloc_context(NULL);
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if (module->nir == NULL)
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ralloc_steal(mem_ctx, nir);
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prog_data.inputs_read = nir->info.inputs_read;
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@@ -560,7 +544,6 @@ anv_pipeline_compile_gs(struct anv_pipeline *pipeline,
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void *mem_ctx = ralloc_context(NULL);
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if (module->nir == NULL)
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ralloc_steal(mem_ctx, nir);
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brw_compute_vue_map(&pipeline->device->info,
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@@ -690,7 +673,6 @@ anv_pipeline_compile_fs(struct anv_pipeline *pipeline,
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void *mem_ctx = ralloc_context(NULL);
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if (module->nir == NULL)
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ralloc_steal(mem_ctx, nir);
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unsigned code_size;
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@@ -763,7 +745,6 @@ anv_pipeline_compile_cs(struct anv_pipeline *pipeline,
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void *mem_ctx = ralloc_context(NULL);
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if (module->nir == NULL)
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ralloc_steal(mem_ctx, nir);
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unsigned code_size;
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@@ -1346,11 +1346,7 @@ struct anv_event {
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struct anv_state state;
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};
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struct nir_shader;
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struct anv_shader_module {
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struct nir_shader * nir;
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unsigned char sha1[20];
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uint32_t size;
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char data[0];
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