nak: Wire up 64-bit nir_op_fadd/ffma/fmul and comparisons
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26743>
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7ced1d3648
@@ -640,20 +640,31 @@ impl<'a> ShaderFromNir<'a> {
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_ => panic!("Unhandled case"),
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};
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let ftype = FloatType::from_bits(alu.def.bit_size().into());
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assert!(alu.def.bit_size() == 32);
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let dst = b.alloc_ssa(RegFile::GPR, 1);
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let saturate = self.try_saturate_alu_dst(&alu.def);
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b.push_op(OpFAdd {
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dst: dst.into(),
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srcs: [x, y],
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saturate: saturate,
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rnd_mode: self.float_ctl[ftype].rnd_mode,
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ftz: self.float_ctl[ftype].ftz,
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});
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let dst;
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if alu.def.bit_size() == 64 {
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dst = b.alloc_ssa(RegFile::GPR, 2);
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b.push_op(OpDAdd {
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dst: dst.into(),
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srcs: [x, y],
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rnd_mode: self.float_ctl[ftype].rnd_mode,
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});
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} else if alu.def.bit_size() == 32 {
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dst = b.alloc_ssa(RegFile::GPR, 1);
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b.push_op(OpFAdd {
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dst: dst.into(),
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srcs: [x, y],
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saturate: self.try_saturate_alu_dst(&alu.def),
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rnd_mode: self.float_ctl[ftype].rnd_mode,
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ftz: self.float_ctl[ftype].ftz,
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});
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} else {
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panic!("Unsupported float type: f{}", alu.def.bit_size());
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}
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dst
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}
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nir_op_fceil | nir_op_ffloor | nir_op_fround_even
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| nir_op_ftrunc => {
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assert!(alu.def.bit_size() == 32);
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let dst = b.alloc_ssa(RegFile::GPR, 1);
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let ty = FloatType::from_bits(alu.def.bit_size().into());
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let rnd_mode = match alu.op {
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@@ -690,31 +701,58 @@ impl<'a> ShaderFromNir<'a> {
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};
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let dst = b.alloc_ssa(RegFile::Pred, 1);
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b.push_op(OpFSetP {
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dst: dst.into(),
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set_op: PredSetOp::And,
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cmp_op: cmp_op,
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srcs: [srcs[0], srcs[1]],
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accum: SrcRef::True.into(),
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ftz: self.float_ctl[src_type].ftz,
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});
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if alu.get_src(0).bit_size() == 64 {
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b.push_op(OpDSetP {
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dst: dst.into(),
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set_op: PredSetOp::And,
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cmp_op: cmp_op,
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srcs: [srcs[0], srcs[1]],
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accum: SrcRef::True.into(),
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});
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} else if alu.get_src(0).bit_size() == 32 {
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b.push_op(OpFSetP {
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dst: dst.into(),
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set_op: PredSetOp::And,
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cmp_op: cmp_op,
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srcs: [srcs[0], srcs[1]],
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accum: SrcRef::True.into(),
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ftz: self.float_ctl[src_type].ftz,
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});
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} else {
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panic!(
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"Unsupported float type: f{}",
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alu.get_src(0).bit_size()
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);
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}
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dst
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}
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nir_op_fexp2 => b.mufu(MuFuOp::Exp2, srcs[0]),
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nir_op_ffma => {
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let ftype = FloatType::from_bits(alu.def.bit_size().into());
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assert!(alu.def.bit_size() == 32);
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let dst = b.alloc_ssa(RegFile::GPR, 1);
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b.push_op(OpFFma {
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dst: dst.into(),
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srcs: [srcs[0], srcs[1], srcs[2]],
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saturate: self.try_saturate_alu_dst(&alu.def),
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rnd_mode: self.float_ctl[ftype].rnd_mode,
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// The hardware doesn't like FTZ+DNZ and DNZ implies FTZ
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// anyway so only set one of the two bits.
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ftz: self.float_ctl[ftype].ftz,
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dnz: false,
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});
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let dst;
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if alu.def.bit_size() == 64 {
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debug_assert!(!self.float_ctl[ftype].ftz);
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dst = b.alloc_ssa(RegFile::GPR, 2);
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b.push_op(OpDFma {
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dst: dst.into(),
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srcs: [srcs[0], srcs[1], srcs[2]],
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rnd_mode: self.float_ctl[ftype].rnd_mode,
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});
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} else if alu.def.bit_size() == 32 {
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dst = b.alloc_ssa(RegFile::GPR, 1);
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b.push_op(OpFFma {
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dst: dst.into(),
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srcs: [srcs[0], srcs[1], srcs[2]],
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saturate: self.try_saturate_alu_dst(&alu.def),
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rnd_mode: self.float_ctl[ftype].rnd_mode,
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// The hardware doesn't like FTZ+DNZ and DNZ implies FTZ
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// anyway so only set one of the two bits.
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ftz: self.float_ctl[ftype].ftz,
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dnz: false,
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});
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} else {
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panic!("Unsupported float type: f{}", alu.def.bit_size());
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}
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dst
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}
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nir_op_ffmaz => {
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@@ -751,16 +789,28 @@ impl<'a> ShaderFromNir<'a> {
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}
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nir_op_fmul => {
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let ftype = FloatType::from_bits(alu.def.bit_size().into());
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assert!(alu.def.bit_size() == 32);
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let dst = b.alloc_ssa(RegFile::GPR, 1);
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b.push_op(OpFMul {
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dst: dst.into(),
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srcs: [srcs[0], srcs[1]],
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saturate: self.try_saturate_alu_dst(&alu.def),
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rnd_mode: self.float_ctl[ftype].rnd_mode,
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ftz: self.float_ctl[ftype].ftz,
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dnz: false,
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});
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let dst;
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if alu.def.bit_size() == 64 {
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debug_assert!(!self.float_ctl[ftype].ftz);
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dst = b.alloc_ssa(RegFile::GPR, 2);
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b.push_op(OpDMul {
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dst: dst.into(),
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srcs: [srcs[0], srcs[1]],
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rnd_mode: self.float_ctl[ftype].rnd_mode,
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});
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} else if alu.def.bit_size() == 32 {
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dst = b.alloc_ssa(RegFile::GPR, 1);
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b.push_op(OpFMul {
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dst: dst.into(),
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srcs: [srcs[0], srcs[1]],
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saturate: self.try_saturate_alu_dst(&alu.def),
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rnd_mode: self.float_ctl[ftype].rnd_mode,
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ftz: self.float_ctl[ftype].ftz,
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dnz: false,
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});
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} else {
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panic!("Unsupported float type: f{}", alu.def.bit_size());
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}
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dst
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}
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nir_op_fmulz => {
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