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intel/compiler: Remove INTEL_DEBUG=tcs8

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For Gen11 and prior, the dispatch mode for TCS was SINGLE_PATCH, and
this debug setting could be used to change it to 8_PATCH (falling back
to SINGLE_PATCH when shader couldn't be in the multi dispatch mode).
However after talking to Ken, seems this debug setting is not really
worth keeping around, so removing it.

For Gen12+ the only option is 8_PATCH, so it was always using that
dispatch mode as before.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18151>
This commit is contained in:
Caio Oliveira
2022-08-19 11:40:13 -07:00
committed by Marge Bot
parent bb2a444324
commit 7cd06249b9
4 changed files with 10 additions and 22 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
src/intel/compiler/brw_compiler.c
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@@ -116,9 +116,7 @@ brw_compiler_create(void *mem_ctx, const struct intel_device_info *devinfo)
compiler->precise_trig = env_var_as_boolean("INTEL_PRECISE_TRIG", false); compiler->precise_trig = env_var_as_boolean("INTEL_PRECISE_TRIG", false);
compiler->use_tcs_8_patch = compiler->use_tcs_8_patch = devinfo->ver >= 12;
devinfo->ver >= 12 ||
(devinfo->ver >= 9 && INTEL_DEBUG(DEBUG_TCS_EIGHT_PATCH));
/* Default to the sampler since that's what we've done since forever */ /* Default to the sampler since that's what we've done since forever */
compiler->indirect_ubos_use_sampler = true; compiler->indirect_ubos_use_sampler = true;

10
src/intel/compiler/brw_vec4_tcs.cpp
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@@ -394,15 +394,7 @@ brw_compile_tcs(const struct brw_compiler *compiler,
prog_data->patch_count_threshold = brw::get_patch_count_threshold(key->input_vertices); prog_data->patch_count_threshold = brw::get_patch_count_threshold(key->input_vertices);
if (compiler->use_tcs_8_patch && if (compiler->use_tcs_8_patch) {
nir->info.tess.tcs_vertices_out <= (devinfo->ver >= 12 ? 32 : 16) &&
2 + has_primitive_id + key->input_vertices <= (devinfo->ver >= 12 ? 63 : 31)) {
/* 3DSTATE_HS imposes two constraints on using 8_PATCH mode. First, the
* "Instance" field limits the number of output vertices to [1, 16] on
* gfx11 and below, or [1, 32] on gfx12 and above. Secondly, the
* "Dispatch GRF Start Register for URB Data" field is limited to [0,
* 31] - which imposes a limit on the input vertices.
*/
vue_prog_data->dispatch_mode = DISPATCH_MODE_TCS_8_PATCH; vue_prog_data->dispatch_mode = DISPATCH_MODE_TCS_8_PATCH;
prog_data->instances = nir->info.tess.tcs_vertices_out; prog_data->instances = nir->info.tess.tcs_vertices_out;
prog_data->include_primitive_id = has_primitive_id; prog_data->include_primitive_id = has_primitive_id;

1
src/intel/dev/intel_debug.c
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@@ -82,7 +82,6 @@ static const struct debug_control debug_control[] = {
{ "color", DEBUG_COLOR }, { "color", DEBUG_COLOR },
{ "reemit", DEBUG_REEMIT }, { "reemit", DEBUG_REEMIT },
{ "soft64", DEBUG_SOFT64 }, { "soft64", DEBUG_SOFT64 },
{ "tcs8", DEBUG_TCS_EIGHT_PATCH },
{ "bt", DEBUG_BT }, { "bt", DEBUG_BT },
{ "pc", DEBUG_PIPE_CONTROL }, { "pc", DEBUG_PIPE_CONTROL },
{ "nofc", DEBUG_NO_FAST_CLEAR }, { "nofc", DEBUG_NO_FAST_CLEAR },

17
src/intel/dev/intel_debug.h
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@@ -81,14 +81,13 @@ extern uint64_t intel_debug;
#define DEBUG_COLOR (1ull << 33) #define DEBUG_COLOR (1ull << 33)
#define DEBUG_REEMIT (1ull << 34) #define DEBUG_REEMIT (1ull << 34)
#define DEBUG_SOFT64 (1ull << 35) #define DEBUG_SOFT64 (1ull << 35)
#define DEBUG_TCS_EIGHT_PATCH (1ull << 36) #define DEBUG_BT (1ull << 36)
#define DEBUG_BT (1ull << 37) #define DEBUG_PIPE_CONTROL (1ull << 37)
#define DEBUG_PIPE_CONTROL (1ull << 38) #define DEBUG_NO_FAST_CLEAR (1ull << 38)
#define DEBUG_NO_FAST_CLEAR (1ull << 39) #define DEBUG_NO32 (1ull << 39)
#define DEBUG_NO32 (1ull << 40) #define DEBUG_RT (1ull << 40)
#define DEBUG_RT (1ull << 41) #define DEBUG_TASK (1ull << 41)
#define DEBUG_TASK (1ull << 42) #define DEBUG_MESH (1ull << 42)
#define DEBUG_MESH (1ull << 43)
#define DEBUG_ANY (~0ull) #define DEBUG_ANY (~0ull)
@@ -99,7 +98,7 @@ extern uint64_t intel_debug;
#define DEBUG_DISK_CACHE_MASK \ #define DEBUG_DISK_CACHE_MASK \
(DEBUG_NO16 | DEBUG_NO_DUAL_OBJECT_GS | DEBUG_NO8 | DEBUG_SPILL_FS | \ (DEBUG_NO16 | DEBUG_NO_DUAL_OBJECT_GS | DEBUG_NO8 | DEBUG_SPILL_FS | \
DEBUG_SPILL_VEC4 | DEBUG_NO_COMPACTION | DEBUG_DO32 | DEBUG_SOFT64 | \ DEBUG_SPILL_VEC4 | DEBUG_NO_COMPACTION | DEBUG_DO32 | DEBUG_SOFT64 | \
DEBUG_TCS_EIGHT_PATCH | DEBUG_NO32) DEBUG_NO32)
#ifdef HAVE_ANDROID_PLATFORM #ifdef HAVE_ANDROID_PLATFORM
#define LOG_TAG "INTEL-MESA" #define LOG_TAG "INTEL-MESA"