intel/compiler: Remove INTEL_DEBUG=tcs8

For Gen11 and prior, the dispatch mode for TCS was SINGLE_PATCH, and
this debug setting could be used to change it to 8_PATCH (falling back
to SINGLE_PATCH when shader couldn't be in the multi dispatch mode).
However after talking to Ken, seems this debug setting is not really
worth keeping around, so removing it.

For Gen12+ the only option is 8_PATCH, so it was always using that
dispatch mode as before.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18151>
This commit is contained in:
Caio Oliveira
2022-08-19 11:40:13 -07:00
committed by Marge Bot
parent bb2a444324
commit 7cd06249b9
4 changed files with 10 additions and 22 deletions

View File

@@ -116,9 +116,7 @@ brw_compiler_create(void *mem_ctx, const struct intel_device_info *devinfo)
compiler->precise_trig = env_var_as_boolean("INTEL_PRECISE_TRIG", false);
compiler->use_tcs_8_patch =
devinfo->ver >= 12 ||
(devinfo->ver >= 9 && INTEL_DEBUG(DEBUG_TCS_EIGHT_PATCH));
compiler->use_tcs_8_patch = devinfo->ver >= 12;
/* Default to the sampler since that's what we've done since forever */
compiler->indirect_ubos_use_sampler = true;

View File

@@ -394,15 +394,7 @@ brw_compile_tcs(const struct brw_compiler *compiler,
prog_data->patch_count_threshold = brw::get_patch_count_threshold(key->input_vertices);
if (compiler->use_tcs_8_patch &&
nir->info.tess.tcs_vertices_out <= (devinfo->ver >= 12 ? 32 : 16) &&
2 + has_primitive_id + key->input_vertices <= (devinfo->ver >= 12 ? 63 : 31)) {
/* 3DSTATE_HS imposes two constraints on using 8_PATCH mode. First, the
* "Instance" field limits the number of output vertices to [1, 16] on
* gfx11 and below, or [1, 32] on gfx12 and above. Secondly, the
* "Dispatch GRF Start Register for URB Data" field is limited to [0,
* 31] - which imposes a limit on the input vertices.
*/
if (compiler->use_tcs_8_patch) {
vue_prog_data->dispatch_mode = DISPATCH_MODE_TCS_8_PATCH;
prog_data->instances = nir->info.tess.tcs_vertices_out;
prog_data->include_primitive_id = has_primitive_id;