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iris: RASTER + SF + some CLIP, fix DIRTY vs. NEW

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This commit is contained in:
Kenneth Graunke
2018-01-09 11:44:04 -08:00
parent 02f583b0a0
commit 7c875deaf0
2 changed files with 37 additions and 28 deletions
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24
src/gallium/drivers/iris/iris_context.h
View File

@@ -36,23 +36,20 @@ struct iris_batch;
#define IRIS_MAX_VIEWPORTS 16
enum iris_dirty {
IRIS_DIRTY_COLOR_CALC_STATE,
IRIS_DIRTY_POLYGON_STIPPLE,
IRIS_DIRTY_SCISSOR_RECT,
IRIS_DIRTY_WM_DEPTH_STENCIL,
IRIS_DIRTY_CC_VIEWPORT,
IRIS_DIRTY_SF_CL_VIEWPORT,
IRIS_DIRTY_PS_BLEND,
IRIS_DIRTY_BLEND_STATE,
IRIS_DIRTY_COLOR_CALC_STATE = (1ull << 0),
IRIS_DIRTY_POLYGON_STIPPLE = (1ull << 1),
IRIS_DIRTY_SCISSOR_RECT = (1ull << 2),
IRIS_DIRTY_WM_DEPTH_STENCIL = (1ull << 3),
IRIS_DIRTY_CC_VIEWPORT = (1ull << 4),
IRIS_DIRTY_SF_CL_VIEWPORT = (1ull << 5),
IRIS_DIRTY_PS_BLEND = (1ull << 6),
IRIS_DIRTY_BLEND_STATE = (1ull << 7),
IRIS_DIRTY_RASTER = (1ull << 8),
IRIS_DIRTY_CLIP = (1ull << 9),
};
struct iris_depth_stencil_alpha_state;
#define IRIS_NEW_COLOR_CALC_STATE (1ull << IRIS_DIRTY_COLOR_CALC_STATE)
#define IRIS_NEW_POLYGON_STIPPLE (1ull << IRIS_DIRTY_POLYGON_STIPPLE)
#define IRIS_NEW_SCISSOR_RECT (1ull << IRIS_DIRTY_SCISSOR_RECT)
#define IRIS_NEW_WM_DEPTH_STENCIL (1ull << IRIS_DIRTY_WM_DEPTH_STENCIL)
struct iris_context {
struct pipe_context ctx;
@@ -61,6 +58,7 @@ struct iris_context {
struct {
uint64_t dirty;
struct iris_blend_state *cso_blend;
struct iris_rasterizer_state *cso_rast;
struct iris_depth_stencil_alpha_state *cso_zsa;
struct pipe_blend_color blend_color;
struct pipe_poly_stipple poly_stipple;

41
src/gallium/drivers/iris/iris_state.c
View File

@@ -530,6 +530,14 @@ iris_create_rasterizer_state(struct pipe_context *ctx,
return cso;
}
static void
iris_bind_rasterizer_state(struct pipe_context *ctx, void *state)
{
struct iris_context *ice = (struct iris_context *) ctx;
ice->state.cso_rast = state;
ice->state.dirty |= IRIS_DIRTY_RASTER;
}
static uint32_t
translate_wrap(unsigned pipe_wrap)
{
@@ -1092,6 +1100,23 @@ iris_upload_render_state(struct iris_context *ice, struct iris_batch *batch)
}
}
if (dirty & IRIS_DIRTY_CLIP) {
struct iris_rasterizer_state *cso = ice->state.cso_rast;
uint32_t dynamic_clip[GENX(3DSTATE_CLIP_length)];
iris_pack_command(GENX(3DSTATE_CLIP), &dynamic_clip, cl) {
//.NonPerspectiveBarycentricEnable = <comes from FS prog> :(
//.ForceZeroRTAIndexEnable = <comes from FB layers being 0>
}
iris_emit_merge(batch, cso->clip, dynamic_clip);
}
if (dirty & IRIS_DIRTY_RASTER) {
struct iris_rasterizer_state *cso = ice->state.cso_rast;
iris_batch_emit(batch, cso->raster, sizeof(cso->raster));
iris_batch_emit(batch, cso->sf, sizeof(cso->sf));
}
#if 0
l3 configuration
@@ -1139,13 +1164,6 @@ iris_upload_render_state(struct iris_context *ice, struct iris_batch *batch)
3DSTATE_SO_BUFFER
3DSTATE_SO_DECL_LIST
3DSTATE_CLIP
-> iris_raster_state + ??? (Non-perspective Bary, ForceZeroRTAIndex)
3DSTATE_RASTER
3DSTATE_SF
-> iris_raster_state
3DSTATE_WM
-> iris_raster_state + FS state (barycentric, EDSC)
3DSTATE_SBE
@@ -1187,13 +1205,6 @@ iris_upload_render_state(struct iris_context *ice, struct iris_batch *batch)
-> ice->state.poly_stipple
3DSTATE_LINE_STIPPLE
-> iris_raster_state
once:
3DSTATE_AA_LINE_PARAMETERS
3DSTATE_WM_CHROMAKEY
3DSTATE_SAMPLE_PATTERN
3DSTATE_DRAWING_RECTANGLE
3DSTATE_WM_HZ_OP
#endif
}
@@ -1217,7 +1228,7 @@ iris_init_state_functions(struct pipe_context *ctx)
ctx->bind_depth_stencil_alpha_state = iris_bind_zsa_state;
ctx->bind_sampler_states = iris_bind_sampler_states;
ctx->bind_fs_state = iris_bind_state;
ctx->bind_rasterizer_state = iris_bind_state;
ctx->bind_rasterizer_state = iris_bind_rasterizer_state;
ctx->bind_vertex_elements_state = iris_bind_state;
ctx->bind_compute_state = iris_bind_state;
ctx->bind_tcs_state = iris_bind_state;