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[intel] Move bufmgr back to context instead of screen, fixing glthreads.

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Putting the bufmgr in the screen is not thread-safe since the emit_reloc
changes.  It also led to a significant performance hit from pthread usage
for the attempted thread-safety (up to 12% of a cpu spent on refcounting
protection in single-threaded 965).  The motivation had been to allow
multi-context bufmgr sharing in classic mode, but it wasn't worth the cost.
This commit is contained in:
Eric Anholt
2007-12-12 10:25:19 -08:00
parent 00e10a1385
commit 7c71ef3a3d
32 changed files with 503 additions and 654 deletions
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118
src/mesa/drivers/dri/i915/intel_context.c
View File

@@ -60,6 +60,7 @@
#include "intel_buffer_objects.h"
#include "intel_fbo.h"
#include "intel_decode.h"
#include "intel_bufmgr_ttm.h"
#include "drirenderbuffer.h"
#include "vblank.h"
@@ -291,6 +292,81 @@ intelFinish(GLcontext * ctx)
}
}
/** Driver-specific fence emit implementation for the fake memory manager. */
static unsigned int
intel_fence_emit(void *private)
{
struct intel_context *intel = (struct intel_context *)private;
unsigned int fence;
/* XXX: Need to emit a flush, if we haven't already (at least with the
* current batchbuffer implementation, we have).
*/
fence = intelEmitIrqLocked(intel);
return fence;
}
/** Driver-specific fence wait implementation for the fake memory manager. */
static int
intel_fence_wait(void *private, unsigned int cookie)
{
struct intel_context *intel = (struct intel_context *)private;
intelWaitIrq(intel, cookie);
return 0;
}
static GLboolean
intel_init_bufmgr(struct intel_context *intel)
{
intelScreenPrivate *intelScreen = intel->intelScreen;
GLboolean ttm_disable = getenv("INTEL_NO_TTM") != NULL;
/* If we've got a new enough DDX that's initializing TTM and giving us
* object handles for the shared buffers, use that.
*/
intel->ttm = GL_FALSE;
if (!ttm_disable &&
intel->intelScreen->driScrnPriv->ddx_version.minor >= 9 &&
intel->intelScreen->drmMinor >= 11 &&
intel->intelScreen->front.bo_handle != -1)
{
intel->bufmgr = intel_bufmgr_ttm_init(intel->driFd,
DRM_FENCE_TYPE_EXE,
DRM_FENCE_TYPE_EXE |
DRM_I915_FENCE_TYPE_RW,
BATCH_SZ);
if (intel->bufmgr != NULL)
intel->ttm = GL_TRUE;
}
/* Otherwise, use the classic buffer manager. */
if (intel->bufmgr == NULL) {
if (ttm_disable) {
fprintf(stderr, "TTM buffer manager disabled. Using classic.\n");
} else {
fprintf(stderr, "Failed to initialize TTM buffer manager. "
"Falling back to classic.\n");
}
if (intelScreen->tex.size == 0) {
fprintf(stderr, "[%s:%u] Error initializing buffer manager.\n",
__func__, __LINE__);
return GL_FALSE;
}
intel->bufmgr = dri_bufmgr_fake_init(intelScreen->tex.offset,
intelScreen->tex.map,
intelScreen->tex.size,
intel_fence_emit,
intel_fence_wait,
intel);
}
return GL_TRUE;
}
void
intelInitDriverFunctions(struct dd_function_table *functions)
@@ -338,9 +414,22 @@ intelInitContext(struct intel_context *intel,
intel->driScreen = sPriv;
intel->sarea = saPriv;
/* Dri stuff */
intel->hHWContext = driContextPriv->hHWContext;
intel->driFd = sPriv->fd;
intel->driHwLock = (drmLock *) & sPriv->pSAREA->lock;
intel->width = intelScreen->width;
intel->height = intelScreen->height;
if (intelScreen->deviceID == PCI_CHIP_I865_G)
intel->maxBatchSize = 4096;
else
intel->maxBatchSize = BATCH_SZ;
if (!intel_init_bufmgr(intel))
return GL_FALSE;
if (!lockMutexInit) {
lockMutexInit = GL_TRUE;
_glthread_INIT_MUTEX(lockMutex);
@@ -391,11 +480,6 @@ intelInitContext(struct intel_context *intel,
_swrast_allow_pixel_fog(ctx, GL_FALSE);
_swrast_allow_vertex_fog(ctx, GL_TRUE);
/* Dri stuff */
intel->hHWContext = driContextPriv->hHWContext;
intel->driFd = sPriv->fd;
intel->driHwLock = (drmLock *) & sPriv->pSAREA->lock;
intel->hw_stipple = 1;
/* XXX FBO: this doesn't seem to be used anywhere */
@@ -436,9 +520,10 @@ intelInitContext(struct intel_context *intel,
/* GL_TRUE, */
GL_FALSE);
if (intelScreen->ttm)
if (intel->ttm)
driInitExtensions(ctx, ttm_extensions, GL_FALSE);
intel_recreate_static_regions(intel);
intel->batch = intel_batchbuffer_alloc(intel);
intel->last_swap_fence = NULL;
@@ -457,11 +542,10 @@ intelInitContext(struct intel_context *intel,
intel->prim.primitive = ~0;
#if DO_DEBUG
INTEL_DEBUG = driParseDebugString(getenv("INTEL_DEBUG"), debug_control);
if (!intel->intelScreen->ttm && (INTEL_DEBUG & DEBUG_BUFMGR))
dri_bufmgr_fake_set_debug(intel->intelScreen->bufmgr, GL_TRUE);
if (!intel->ttm && (INTEL_DEBUG & DEBUG_BUFMGR))
dri_bufmgr_fake_set_debug(intel->bufmgr, GL_TRUE);
#endif
if (getenv("INTEL_NO_RAST")) {
@@ -507,6 +591,7 @@ intelDestroyContext(__DRIcontextPrivate * driContextPriv)
intel->first_swap_fence = NULL;
}
dri_bufmgr_destroy(intel->bufmgr);
if (release_texture_heaps) {
/* This share group is about to go away, free our private
@@ -551,21 +636,21 @@ intelMakeCurrent(__DRIcontextPrivate * driContextPriv,
if (intel_fb->color_rb[0] && !intel_fb->color_rb[0]->region) {
intel_region_reference(&intel_fb->color_rb[0]->region,
intel->intelScreen->front_region);
intel->front_region);
}
if (intel_fb->color_rb[1] && !intel_fb->color_rb[1]->region) {
intel_region_reference(&intel_fb->color_rb[1]->region,
intel->intelScreen->back_region);
intel->back_region);
}
if (intel_fb->color_rb[2] && !intel_fb->color_rb[2]->region) {
intel_region_reference(&intel_fb->color_rb[2]->region,
intel->intelScreen->third_region);
intel->third_region);
}
if (irbDepth && !irbDepth->region) {
intel_region_reference(&irbDepth->region, intel->intelScreen->depth_region);
intel_region_reference(&irbDepth->region, intel->depth_region);
}
if (irbStencil && !irbStencil->region) {
intel_region_reference(&irbStencil->region, intel->intelScreen->depth_region);
intel_region_reference(&irbStencil->region, intel->depth_region);
}
}
@@ -618,7 +703,6 @@ intelContendedLock(struct intel_context *intel, GLuint flags)
{
__DRIdrawablePrivate *dPriv = intel->driDrawable;
__DRIscreenPrivate *sPriv = intel->driScreen;
intelScreenPrivate *intelScreen = (intelScreenPrivate *) sPriv->private;
drmI830Sarea *sarea = intel->sarea;
drmGetLock(intel->driFd, intel->hHWContext, flags);
@@ -639,9 +723,9 @@ intelContendedLock(struct intel_context *intel, GLuint flags)
* between contexts of a single fake bufmgr, but this will at least make
* things correct for now.
*/
if (!intel->intelScreen->ttm && sarea->texAge != intel->hHWContext) {
if (!intel->ttm && sarea->texAge != intel->hHWContext) {
sarea->texAge = intel->hHWContext;
dri_bufmgr_fake_contended_lock_take(intel->intelScreen->bufmgr);
dri_bufmgr_fake_contended_lock_take(intel->bufmgr);
if (INTEL_DEBUG & DEBUG_BATCH)
intel_decode_context_reset();
}

16
src/mesa/drivers/dri/i915/intel_context.h
View File

@@ -34,6 +34,7 @@
#include "drm.h"
#include "mm.h"
#include "texmem.h"
#include "dri_bufmgr.h"
#include "intel_screen.h"
#include "intel_tex_obj.h"
@@ -142,10 +143,25 @@ struct intel_context
GLuint Fallback;
GLuint NewGLState;
dri_bufmgr *bufmgr;
unsigned int maxBatchSize;
struct intel_region *front_region;
struct intel_region *back_region;
struct intel_region *third_region;
struct intel_region *depth_region;
/**
* This value indicates that the kernel memory manager is being used
* instead of the fake client-side memory manager.
*/
GLboolean ttm;
dri_fence *last_swap_fence;
dri_fence *first_swap_fence;
struct intel_batchbuffer *batch;
unsigned batch_id;
GLuint last_state_batch_id;
struct

12
src/mesa/drivers/dri/i915/intel_ioctl.c
View File

@@ -47,15 +47,14 @@
#define FILE_DEBUG_FLAG DEBUG_IOCTL
int
intelEmitIrqLocked(intelScreenPrivate *intelScreen)
intelEmitIrqLocked(struct intel_context *intel)
{
drmI830IrqEmit ie;
int ret, seq;
ie.irq_seq = &seq;
ret = drmCommandWriteRead(intelScreen->driScrnPriv->fd,
DRM_I830_IRQ_EMIT, &ie, sizeof(ie));
ret = drmCommandWriteRead(intel->driFd, DRM_I830_IRQ_EMIT, &ie, sizeof(ie));
if (ret) {
fprintf(stderr, "%s: drmI830IrqEmit: %d\n", __FUNCTION__, ret);
exit(1);
@@ -67,7 +66,7 @@ intelEmitIrqLocked(intelScreenPrivate *intelScreen)
}
void
intelWaitIrq(intelScreenPrivate *intelScreen, int seq)
intelWaitIrq(struct intel_context *intel, int seq)
{
drm_i915_irq_wait_t iw;
int ret;
@@ -77,8 +76,7 @@ intelWaitIrq(intelScreenPrivate *intelScreen, int seq)
iw.irq_seq = seq;
do {
ret = drmCommandWrite(intelScreen->driScrnPriv->fd,
DRM_I830_IRQ_WAIT, &iw, sizeof(iw));
ret = drmCommandWrite(intel->driFd, DRM_I830_IRQ_WAIT, &iw, sizeof(iw));
} while (ret == -EAGAIN || ret == -EINTR);
if (ret) {
@@ -170,7 +168,7 @@ intel_exec_ioctl(struct intel_context *intel,
}
fo = intel_ttm_fence_create_from_arg(intel->intelScreen->bufmgr, "fence buffers",
fo = intel_ttm_fence_create_from_arg(intel->bufmgr, "fence buffers",
&execbuf.fence_arg);
if (!fo) {
fprintf(stderr, "failed to fence handle: %08x\n", execbuf.fence_arg.handle);

4
src/mesa/drivers/dri/i915/intel_ioctl.h
View File

@@ -30,8 +30,8 @@
#include "intel_context.h"
void intelWaitIrq(intelScreenPrivate *intelScreen, int seq);
int intelEmitIrqLocked(intelScreenPrivate *intelScreen);
void intelWaitIrq(struct intel_context *intel, int seq);
int intelEmitIrqLocked(struct intel_context *intel);
void intel_batch_ioctl(struct intel_context *intel,
GLuint start_offset,

9
src/mesa/drivers/dri/i915/intel_pixel_copy.c
View File

@@ -54,9 +54,8 @@ copypix_src_region(struct intel_context *intel, GLenum type)
case GL_DEPTH:
/* Don't think this is really possible execpt at 16bpp, when we have no stencil.
*/
if (intel->intelScreen->depth_region &&
intel->intelScreen->depth_region->cpp == 2)
return intel->intelScreen->depth_region;
if (intel->depth_region && intel->depth_region->cpp == 2)
return intel->depth_region;
case GL_STENCIL:
/* Don't think this is really possible.
*/
@@ -64,7 +63,7 @@ copypix_src_region(struct intel_context *intel, GLenum type)
case GL_DEPTH_STENCIL_EXT:
/* Does it matter whether it is stencil/depth or depth/stencil?
*/
return intel->intelScreen->depth_region;
return intel->depth_region;
default:
break;
}
@@ -164,7 +163,7 @@ do_texture_copypixels(GLcontext * ctx,
/* Set the 3d engine to draw into the destination region:
*/
intel->vtbl.meta_draw_region(intel, dst, intel->intelScreen->depth_region);
intel->vtbl.meta_draw_region(intel, dst, intel->depth_region);
intel->vtbl.meta_import_pixel_state(intel);

2
src/mesa/drivers/dri/i915/intel_pixel_draw.c
View File

@@ -112,7 +112,7 @@ do_texture_drawpixels(GLcontext * ctx,
/* Set the 3d engine to draw into the destination region:
*/
intel->vtbl.meta_draw_region(intel, dst, intel->intelScreen->depth_region);
intel->vtbl.meta_draw_region(intel, dst, intel->depth_region);
intel->vtbl.meta_import_pixel_state(intel);

2
src/mesa/drivers/dri/i965/brw_draw.c
View File

@@ -472,7 +472,7 @@ void brw_draw_init( struct brw_context *brw )
/* Set the internal VBOs to no-backing-store. We only use them as a
* temporary within a brw_try_draw_prims while the lock is held.
*/
if (!brw->intel.intelScreen->ttm) {
if (!brw->intel.ttm) {
struct intel_buffer_object *intel_bo =
intel_buffer_object(brw->vb.upload.vbo[i]);

4
src/mesa/drivers/dri/i965/brw_state_pool.c
View File

@@ -88,7 +88,7 @@ static void brw_init_pool( struct brw_context *brw,
pool->size = size;
pool->brw = brw;
pool->buffer = dri_bo_alloc(brw->intel.intelScreen->bufmgr,
pool->buffer = dri_bo_alloc(brw->intel.bufmgr,
(pool_id == BRW_GS_POOL) ? "GS pool" : "SS pool",
size, 4096, DRM_BO_FLAG_MEM_TT);
@@ -97,7 +97,7 @@ static void brw_init_pool( struct brw_context *brw,
* the contents at approximately the same cost as the memcpy, and only
* if the contents are lost.
*/
if (!brw->intel.intelScreen->ttm) {
if (!brw->intel.ttm) {
dri_bo_fake_disable_backing_store(pool->buffer, brw_invalidate_pool_cb,
pool);
}

2
src/mesa/drivers/dri/i965/brw_wm_state.c
View File

@@ -81,7 +81,7 @@ static void upload_wm_unit(struct brw_context *brw )
brw->wm.scratch_buffer = NULL;
}
if (!brw->wm.scratch_buffer) {
brw->wm.scratch_buffer = dri_bo_alloc(intel->intelScreen->bufmgr,
brw->wm.scratch_buffer = dri_bo_alloc(intel->bufmgr,
"wm scratch",
brw->wm.scratch_buffer_size,
4096, DRM_BO_FLAG_MEM_TT);

2
src/mesa/drivers/dri/i965/intel_buffer_objects.c
View File

@@ -39,7 +39,7 @@ static void
intel_bufferobj_alloc_buffer(struct intel_context *intel,
struct intel_buffer_object *intel_obj)
{
intel_obj->buffer = dri_bo_alloc(intel->intelScreen->bufmgr, "bufferobj",
intel_obj->buffer = dri_bo_alloc(intel->bufmgr, "bufferobj",
intel_obj->Base.Size, 64,
DRM_BO_FLAG_MEM_TT);
}

128
src/mesa/drivers/dri/i965/intel_context.c
View File

@@ -59,8 +59,9 @@
#include "intel_regions.h"
#include "intel_buffer_objects.h"
#include "intel_decode.h"
#include "intel_bufmgr_ttm.h"
#include "dri_bufmgr.h"
#include "i915_drm.h"
#include "utils.h"
#include "vblank.h"
@@ -315,6 +316,82 @@ intelEndQuery(GLcontext *ctx, GLenum target, struct gl_query_object *q)
intel->stats_wm--;
}
/** Driver-specific fence emit implementation for the fake memory manager. */
static unsigned int
intel_fence_emit(void *private)
{
struct intel_context *intel = (struct intel_context *)private;
unsigned int fence;
/* XXX: Need to emit a flush, if we haven't already (at least with the
* current batchbuffer implementation, we have).
*/
fence = intelEmitIrqLocked(intel);
return fence;
}
/** Driver-specific fence wait implementation for the fake memory manager. */
static int
intel_fence_wait(void *private, unsigned int cookie)
{
struct intel_context *intel = (struct intel_context *)private;
intelWaitIrq(intel, cookie);
return 0;
}
static GLboolean
intel_init_bufmgr(struct intel_context *intel)
{
intelScreenPrivate *intelScreen = intel->intelScreen;
GLboolean ttm_disable = getenv("INTEL_NO_TTM") != NULL;
/* If we've got a new enough DDX that's initializing TTM and giving us
* object handles for the shared buffers, use that.
*/
intel->ttm = GL_FALSE;
if (!ttm_disable &&
intel->intelScreen->driScrnPriv->ddx_version.minor >= 9 &&
intel->intelScreen->drmMinor >= 11 &&
intel->intelScreen->front.bo_handle != -1)
{
intel->bufmgr = intel_bufmgr_ttm_init(intel->driFd,
DRM_FENCE_TYPE_EXE,
DRM_FENCE_TYPE_EXE |
DRM_I915_FENCE_TYPE_RW,
BATCH_SZ);
if (intel->bufmgr != NULL)
intel->ttm = GL_TRUE;
}
/* Otherwise, use the classic buffer manager. */
if (intel->bufmgr == NULL) {
if (ttm_disable) {
fprintf(stderr, "TTM buffer manager disabled. Using classic.\n");
} else {
fprintf(stderr, "Failed to initialize TTM buffer manager. "
"Falling back to classic.\n");
}
if (intelScreen->tex.size == 0) {
fprintf(stderr, "[%s:%u] Error initializing buffer manager.\n",
__func__, __LINE__);
return GL_FALSE;
}
intel->bufmgr = dri_bufmgr_fake_init(intelScreen->tex.offset,
intelScreen->tex.map,
intelScreen->tex.size,
intel_fence_emit,
intel_fence_wait,
intel);
}
return GL_TRUE;
}
void intelInitDriverFunctions( struct dd_function_table *functions )
{
@@ -340,24 +417,6 @@ void intelInitDriverFunctions( struct dd_function_table *functions )
intelInitBufferFuncs( functions );
}
static void
intel_update_screen_regions(struct intel_context *intel)
{
intel->bufmgr = intel->intelScreen->bufmgr;
intel_region_release(intel, &intel->front_region);
intel_region_reference(&intel->front_region,
intel->intelScreen->front_region);
intel_region_release(intel, &intel->back_region);
intel_region_reference(&intel->back_region,
intel->intelScreen->back_region);
intel_region_release(intel, &intel->depth_region);
intel_region_reference(&intel->depth_region,
intel->intelScreen->depth_region);
}
GLboolean intelInitContext( struct intel_context *intel,
const __GLcontextModes *mesaVis,
__DRIcontextPrivate *driContextPriv,
@@ -384,6 +443,16 @@ GLboolean intelInitContext( struct intel_context *intel,
intel->driScreen = sPriv;
intel->sarea = saPriv;
/* Dri stuff */
intel->hHWContext = driContextPriv->hHWContext;
intel->driFd = sPriv->fd;
intel->driHwLock = (drmLock *) &sPriv->pSAREA->lock;
intel->maxBatchSize = BATCH_SZ;
if (!intel_init_bufmgr(intel))
return GL_FALSE;
driParseConfigFiles (&intel->optionCache, &intelScreen->optionCache,
intel->driScreen->myNum, "i965");
@@ -431,11 +500,6 @@ GLboolean intelInitContext( struct intel_context *intel,
_swrast_allow_pixel_fog( ctx, GL_FALSE );
_swrast_allow_vertex_fog( ctx, GL_TRUE );
/* Dri stuff */
intel->hHWContext = driContextPriv->hHWContext;
intel->driFd = sPriv->fd;
intel->driHwLock = (drmLock *) &sPriv->pSAREA->lock;
intel->hw_stencil = mesaVis->stencilBits && mesaVis->depthBits == 24;
intel->hw_stipple = 1;
@@ -470,10 +534,10 @@ GLboolean intelInitContext( struct intel_context *intel,
INTEL_DEBUG = driParseDebugString( getenv( "INTEL_DEBUG" ),
debug_control );
if (!intel->intelScreen->ttm && (INTEL_DEBUG & DEBUG_BUFMGR))
dri_bufmgr_fake_set_debug(intel->intelScreen->bufmgr, GL_TRUE);
if (!intel->ttm && (INTEL_DEBUG & DEBUG_BUFMGR))
dri_bufmgr_fake_set_debug(intel->bufmgr, GL_TRUE);
intel_update_screen_regions(intel);
intel_recreate_static_regions(intel);
intel_bufferobj_init( intel );
intel->batch = intel_batchbuffer_alloc( intel );
@@ -493,12 +557,16 @@ GLboolean intelInitContext( struct intel_context *intel,
/* DRI_TEXMGR_DO_TEXTURE_2D | */
/* DRI_TEXMGR_DO_TEXTURE_RECT ); */
/* Force all software fallbacks */
if (getenv("INTEL_NO_RAST")) {
fprintf(stderr, "disabling 3D rasterization\n");
intel->no_rast = 1;
}
/* Disable all hardware rendering (skip emitting batches and fences/waits
* to the kernel)
*/
intel->no_hw = getenv("INTEL_NO_HW") != NULL;
return GL_TRUE;
}
@@ -643,9 +711,9 @@ static void intelContendedLock( struct intel_context *intel, GLuint flags )
* between contexts of a single fake bufmgr, but this will at least make
* things correct for now.
*/
if (!intel->intelScreen->ttm && sarea->texAge != intel->hHWContext) {
if (!intel->ttm && sarea->texAge != intel->hHWContext) {
sarea->texAge = intel->hHWContext;
dri_bufmgr_fake_contended_lock_take(intel->intelScreen->bufmgr);
dri_bufmgr_fake_contended_lock_take(intel->bufmgr);
if (INTEL_DEBUG & DEBUG_BATCH)
intel_decode_context_reset();
if (INTEL_DEBUG & DEBUG_BUFMGR) {

23
src/mesa/drivers/dri/i965/intel_context.h
View File

@@ -158,12 +158,27 @@ struct intel_context
GLuint Fallback;
GLuint NewGLState;
dri_bufmgr *bufmgr;
unsigned int maxBatchSize;
struct intel_region *front_region;
struct intel_region *back_region;
struct intel_region *third_region;
struct intel_region *depth_region;
/**
* This value indicates that the kernel memory manager is being used
* instead of the fake client-side memory manager.
*/
GLboolean ttm;
dri_fence *first_swap_fence;
dri_fence *last_swap_fence;
GLuint stats_wm;
struct intel_batchbuffer *batch;
unsigned batch_id;
GLubyte clear_chan[4];
GLuint ClearColor;
@@ -205,12 +220,6 @@ struct intel_context
drmLock *driHwLock;
int driFd;
/* Cached values from the screen private. */
dri_bufmgr *bufmgr;
struct intel_region *front_region;
struct intel_region *back_region;
struct intel_region *depth_region;
__DRIdrawablePrivate *driDrawable;
__DRIdrawablePrivate *driReadDrawable;
__DRIscreenPrivate *driScreen;
@@ -219,6 +228,8 @@ struct intel_context
GLuint lastStamp;
GLboolean no_hw;
/**
* Configuration cache
*/

26
src/mesa/drivers/dri/i965/intel_ioctl.c
View File

@@ -52,15 +52,15 @@ static void intelWaitIdleLocked( struct intel_context *intel )
if (INTEL_DEBUG & DEBUG_SYNC)
fprintf(stderr, "waiting for idle\n");
fence = intelEmitIrqLocked(intel->intelScreen);
intelWaitIrq(intel->intelScreen, fence);
fence = intelEmitIrqLocked(intel);
intelWaitIrq(intel, fence);
}
int intelEmitIrqLocked( intelScreenPrivate *intelScreen )
int intelEmitIrqLocked( struct intel_context *intel )
{
int seq = 1;
if (!intelScreen->no_hw) {
if (!intel->no_hw) {
drmI830IrqEmit ie;
int ret;
/*
@@ -69,7 +69,7 @@ int intelEmitIrqLocked( intelScreenPrivate *intelScreen )
*/
ie.irq_seq = &seq;
ret = drmCommandWriteRead( intelScreen->driScrnPriv->fd,
ret = drmCommandWriteRead( intel->driFd,
DRM_I830_IRQ_EMIT,
&ie, sizeof(ie) );
if ( ret ) {
@@ -84,14 +84,12 @@ int intelEmitIrqLocked( intelScreenPrivate *intelScreen )
return seq;
}
void intelWaitIrq( intelScreenPrivate *intelScreen, int seq )
void intelWaitIrq( struct intel_context *intel, int seq )
{
if (!intelScreen->no_hw) {
if (!intel->no_hw) {
drmI830IrqWait iw;
int ret, lastdispatch;
volatile drmI830Sarea *sarea = (volatile drmI830Sarea *)
(((GLubyte *)intelScreen->driScrnPriv->pSAREA) +
intelScreen->sarea_priv_offset);
volatile drmI830Sarea *sarea = intel->sarea;
if (0)
fprintf(stderr, "%s %d\n", __FUNCTION__, seq );
@@ -100,7 +98,7 @@ void intelWaitIrq( intelScreenPrivate *intelScreen, int seq )
do {
lastdispatch = sarea->last_dispatch;
ret = drmCommandWrite( intelScreen->driScrnPriv->fd,
ret = drmCommandWrite( intel->driFd,
DRM_I830_IRQ_WAIT, &iw, sizeof(iw) );
/* This seems quite often to return before it should!?!
@@ -151,7 +149,7 @@ void intel_batch_ioctl( struct intel_context *intel,
batch.start,
batch.start + batch.used * 4);
if (!intel->intelScreen->no_hw) {
if (!intel->no_hw) {
if (drmCommandWrite (intel->driFd, DRM_I830_BATCHBUFFER, &batch,
sizeof(batch))) {
fprintf(stderr, "DRM_I830_BATCHBUFFER: %d\n", -errno);
@@ -190,7 +188,7 @@ intel_exec_ioctl(struct intel_context *intel,
execbuf.ops_list = (unsigned)start; // TODO
execbuf.fence_arg.flags = DRM_FENCE_FLAG_SHAREABLE | DRM_I915_FENCE_FLAG_FLUSHED;
if (intel->intelScreen->no_hw)
if (intel->no_hw)
return;
if (drmCommandWriteRead(intel->driFd, DRM_I915_EXECBUFFER, &execbuf,
@@ -201,7 +199,7 @@ intel_exec_ioctl(struct intel_context *intel,
}
fo = intel_ttm_fence_create_from_arg(intel->intelScreen->bufmgr, "fence buffers",
fo = intel_ttm_fence_create_from_arg(intel->bufmgr, "fence buffers",
&execbuf.fence_arg);
if (!fo) {
fprintf(stderr, "failed to fence handle: %08x\n", execbuf.fence_arg.handle);

4
src/mesa/drivers/dri/i965/intel_ioctl.h
View File

@@ -30,8 +30,8 @@
#include "intel_context.h"
void intelWaitIrq( intelScreenPrivate *intelScreen, int seq );
int intelEmitIrqLocked( intelScreenPrivate *intelScreen );
void intelWaitIrq( struct intel_context *intel, int seq );
int intelEmitIrqLocked( struct intel_context *intel );
void intel_batch_ioctl( struct intel_context *intel,
GLuint start_offset,

151
src/mesa/drivers/dri/i965/intel_regions.c
View File

@@ -86,7 +86,7 @@ struct intel_region *intel_region_alloc( struct intel_context *intel,
region->height = height; /* needed? */
region->refcount = 1;
region->buffer = dri_bo_alloc(intel->intelScreen->bufmgr, "region",
region->buffer = dri_bo_alloc(intel->bufmgr, "region",
pitch * cpp * height, 64, DRM_BO_FLAG_MEM_TT);
return region;
@@ -116,79 +116,6 @@ void intel_region_release( struct intel_context *intel,
*region = NULL;
}
struct intel_region *intel_region_create_static(intelScreenPrivate *intelScreen,
char *name,
GLuint mem_type,
unsigned int bo_handle,
GLuint offset,
void *virtual,
GLuint cpp, GLuint pitch,
GLuint height, GLboolean tiled)
{
struct intel_region *region = calloc(sizeof(*region), 1);
DBG("%s\n", __FUNCTION__);
region->cpp = cpp;
region->pitch = pitch;
region->height = height; /* needed? */
region->refcount = 1;
region->tiled = tiled;
if (intelScreen->ttm) {
assert(bo_handle != -1);
region->buffer = intel_ttm_bo_create_from_handle(intelScreen->bufmgr,
name,
bo_handle);
} else {
region->buffer = dri_bo_alloc_static(intelScreen->bufmgr,
name,
offset, pitch * cpp * height,
virtual,
DRM_BO_FLAG_MEM_TT);
}
return region;
}
void
intel_region_update_static(intelScreenPrivate *intelScreen,
struct intel_region *region,
GLuint mem_type,
unsigned int bo_handle,
GLuint offset,
void *virtual,
GLuint cpp, GLuint pitch, GLuint height,
GLboolean tiled)
{
DBG("%s\n", __FUNCTION__);
region->cpp = cpp;
region->pitch = pitch;
region->height = height; /* needed? */
region->tiled = tiled;
/*
* We use a "shared" buffer type to indicate buffers created and
* shared by others.
*/
dri_bo_unreference(region->buffer);
if (intelScreen->ttm) {
assert(bo_handle != -1);
region->buffer = intel_ttm_bo_create_from_handle(intelScreen->bufmgr,
"static region",
bo_handle);
} else {
region->buffer = dri_bo_alloc_static(intelScreen->bufmgr,
"static region",
offset, pitch * cpp * height,
virtual,
DRM_BO_FLAG_MEM_TT);
}
}
void _mesa_copy_rect( GLubyte *dst,
GLuint cpp,
GLuint dst_pitch,
@@ -300,3 +227,79 @@ void intel_region_fill( struct intel_context *intel,
color );
}
static struct intel_region *
intel_recreate_static(struct intel_context *intel,
const char *name,
struct intel_region *region,
intelRegion *region_desc,
GLuint mem_type)
{
intelScreenPrivate *intelScreen = intel->intelScreen;
if (region == NULL) {
region = calloc(sizeof(*region), 1);
region->refcount = 1;
}
region->cpp = intelScreen->cpp;
region->pitch = region_desc->pitch / intelScreen->cpp;
region->height = intelScreen->height; /* needed? */
region->tiled = region_desc->tiled;
if (intel->ttm) {
assert(region_desc->bo_handle != -1);
region->buffer = intel_ttm_bo_create_from_handle(intel->bufmgr,
name,
region_desc->bo_handle);
} else {
region->buffer = dri_bo_alloc_static(intel->bufmgr,
name,
region_desc->offset,
region_desc->pitch *
intelScreen->height,
region_desc->map,
DRM_BO_FLAG_MEM_TT);
}
assert(region->buffer != NULL);
return region;
}
/**
* Create intel_region structs to describe the static front, back, and depth
* buffers created by the xserver.
*
* Although FBO's mean we now no longer use these as render targets in
* all circumstances, they won't go away until the back and depth
* buffers become private, and the front buffer will remain even then.
*
* Note that these don't allocate video memory, just describe
* allocations alread made by the X server.
*/
void
intel_recreate_static_regions(struct intel_context *intel)
{
intelScreenPrivate *intelScreen = intel->intelScreen;
intel->front_region =
intel_recreate_static(intel, "front",
intel->front_region,
&intelScreen->front,
DRM_BO_FLAG_MEM_TT);
intel->back_region =
intel_recreate_static(intel, "back",
intel->back_region,
&intelScreen->back,
DRM_BO_FLAG_MEM_TT);
/* Still assumes front.cpp == depth.cpp. We can kill this when we move to
* private buffers.
*/
intel->depth_region =
intel_recreate_static(intel, "depth",
intel->depth_region,
&intelScreen->depth,
DRM_BO_FLAG_MEM_TT);
}

2
src/mesa/drivers/dri/i965/intel_regions.h
View File

@@ -67,6 +67,8 @@ void intel_region_reference( struct intel_region **dst,
void intel_region_release(struct intel_context *intel,
struct intel_region **ib );
void intel_recreate_static_regions(struct intel_context *intel);
/* Static regions may be tiled. The assumption is that the X server
* has set up fence registers to define tiled zones in agp and these
* buffers are within those zones. Tiling regions without fence

136
src/mesa/drivers/dri/i965/intel_screen.c
View File

@@ -129,108 +129,6 @@ intelMapScreenRegions(__DRIscreenPrivate *sPriv)
return GL_TRUE;
}
/** Driver-specific fence emit implementation for the fake memory manager. */
static unsigned int
intel_fence_emit(void *private)
{
intelScreenPrivate *intelScreen = (intelScreenPrivate *)private;
unsigned int fence;
/* XXX: Need to emit a flush, if we haven't already (at least with the
* current batchbuffer implementation, we have).
*/
fence = intelEmitIrqLocked(intelScreen);
return fence;
}
/** Driver-specific fence wait implementation for the fake memory manager. */
static int
intel_fence_wait(void *private, unsigned int cookie)
{
intelScreenPrivate *intelScreen = (intelScreenPrivate *)private;
intelWaitIrq(intelScreen, cookie);
return 0;
}
static struct intel_region *
intel_recreate_static(intelScreenPrivate *intelScreen,
char *name, struct intel_region *region,
intelRegion *region_desc,
GLuint mem_type)
{
if (region) {
intel_region_update_static(intelScreen, region, mem_type,
region_desc->bo_handle, region_desc->offset,
region_desc->map, intelScreen->cpp,
region_desc->pitch / intelScreen->cpp,
intelScreen->height, region_desc->tiled);
} else {
region = intel_region_create_static(intelScreen, name, mem_type,
region_desc->bo_handle,
region_desc->offset,
region_desc->map, intelScreen->cpp,
region_desc->pitch / intelScreen->cpp,
intelScreen->height,
region_desc->tiled);
}
assert(region->buffer != NULL);
return region;
}
/* Create intel_region structs to describe the static front,back,depth
* buffers created by the xserver.
*
* Although FBO's mean we now no longer use these as render targets in
* all circumstances, they won't go away until the back and depth
* buffers become private, and the front and rotated buffers will
* remain even then.
*
* Note that these don't allocate video memory, just describe
* allocations alread made by the X server.
*/
static void
intel_recreate_static_regions(intelScreenPrivate *intelScreen)
{
intelScreen->front_region =
intel_recreate_static(intelScreen, "front",
intelScreen->front_region,
&intelScreen->front,
DRM_BO_FLAG_MEM_TT);
/* The rotated region is only used for old DDXes that didn't handle rotation
* on their own.
*/
if (intelScreen->driScrnPriv->ddx_version.minor < 8) {
intelScreen->rotated_region =
intel_recreate_static(intelScreen, "rotated",
intelScreen->rotated_region,
&intelScreen->rotated,
DRM_BO_FLAG_MEM_TT);
}
intelScreen->back_region =
intel_recreate_static(intelScreen, "back",
intelScreen->back_region,
&intelScreen->back,
DRM_BO_FLAG_MEM_TT);
/* Still assumes front.cpp == depth.cpp. We can kill this when we move to
* private buffers.
*/
intelScreen->depth_region =
intel_recreate_static(intelScreen, "depth",
intelScreen->depth_region,
&intelScreen->depth,
DRM_BO_FLAG_MEM_TT);
}
void
intelUnmapScreenRegions(intelScreenPrivate *intelScreen)
{
@@ -415,7 +313,6 @@ static GLboolean intelInitDriver(__DRIscreenPrivate *sPriv)
(((GLubyte *)sPriv->pSAREA)+intelScreen->sarea_priv_offset);
intelScreen->deviceID = gDRIPriv->deviceID;
intelScreen->maxBatchSize = 16 * 1024;
intelScreen->mem = gDRIPriv->mem;
intelScreen->cpp = gDRIPriv->cpp;
@@ -473,39 +370,6 @@ static GLboolean intelInitDriver(__DRIscreenPrivate *sPriv)
sPriv->extensions = intelExtensions;
if (getenv("INTEL_NO_TTM") == NULL &&
intelScreen->driScrnPriv->ddx_version.minor >= 9 &&
intelScreen->drmMinor >= 11 &&
intelScreen->front.bo_handle != -1) {
intelScreen->bufmgr = intel_bufmgr_ttm_init(sPriv->fd,
DRM_FENCE_TYPE_EXE,
DRM_FENCE_TYPE_EXE |
DRM_I915_FENCE_TYPE_RW,
intelScreen->maxBatchSize);
if (intelScreen->bufmgr != NULL)
intelScreen->ttm = GL_TRUE;
}
/* Otherwise, use the classic buffer manager. */
if (intelScreen->bufmgr == NULL) {
if (intelScreen->tex.size == 0) {
fprintf(stderr, "[%s:%u] Error initializing buffer manager.\n",
__func__, __LINE__);
return GL_FALSE;
}
fprintf(stderr, "[%s:%u] Failed to init TTM buffer manager, falling back"
" to classic.\n", __func__, __LINE__);
intelScreen->bufmgr = dri_bufmgr_fake_init(intelScreen->tex.offset,
intelScreen->tex.map,
intelScreen->tex.size,
intel_fence_emit,
intel_fence_wait,
intelScreen);
}
intel_recreate_static_regions(intelScreen);
intelScreen->no_hw = getenv("INTEL_NO_HW") != NULL;
return GL_TRUE;
}

18
src/mesa/drivers/dri/i965/intel_screen.h
View File

@@ -55,11 +55,6 @@ typedef struct
intelRegion depth;
intelRegion tex;
struct intel_region *front_region;
struct intel_region *back_region;
struct intel_region *depth_region;
struct intel_region *rotated_region;
int deviceID;
int width;
int height;
@@ -83,23 +78,10 @@ typedef struct
int current_rotation; /* 0, 90, 180 or 270 */
int rotatedWidth, rotatedHeight;
GLboolean no_hw;
/**
* Configuration cache with default values for all contexts
*/
driOptionCache optionCache;
dri_bufmgr *bufmgr;
unsigned int maxBatchSize;
/**
* This value indicates that the kernel memory manager is being used
* instead of the fake client-side memory manager.
*/
GLboolean ttm;
unsigned batch_id;
} intelScreenPrivate;

10
src/mesa/drivers/dri/intel/intel_batchbuffer.c
View File

@@ -78,15 +78,15 @@ intel_batchbuffer_reset(struct intel_batchbuffer *batch)
batch->buf = NULL;
}
batch->buf = dri_bo_alloc(intel->intelScreen->bufmgr, "batchbuffer",
intel->intelScreen->maxBatchSize, 4096,
batch->buf = dri_bo_alloc(intel->bufmgr, "batchbuffer",
intel->maxBatchSize, 4096,
DRM_BO_FLAG_MEM_LOCAL | DRM_BO_FLAG_CACHED | DRM_BO_FLAG_CACHED_MAPPED);
dri_bo_map(batch->buf, GL_TRUE);
batch->map = batch->buf->virtual;
batch->size = intel->intelScreen->maxBatchSize;
batch->size = intel->maxBatchSize;
batch->ptr = batch->map;
batch->dirty_state = ~0;
batch->id = batch->intel->intelScreen->batch_id++;
batch->id = batch->intel->batch_id++;
}
struct intel_batchbuffer *
@@ -144,7 +144,7 @@ do_flush_locked(struct intel_batchbuffer *batch,
*/
if (!(intel->numClipRects == 0 && !ignore_cliprects)) {
if (intel->intelScreen->ttm == GL_TRUE) {
if (intel->ttm == GL_TRUE) {
intel_exec_ioctl(batch->intel,
used, ignore_cliprects, allow_unlock,
start, count, &batch->last_fence);

2
src/mesa/drivers/dri/intel/intel_blit.c
View File

@@ -459,7 +459,7 @@ intelClearWithBlit(GLcontext * ctx, GLbitfield mask)
struct intel_region *irb_region =
intel_get_rb_region(fb, buf);
dri_bo *write_buffer =
intel_region_buffer(intel->intelScreen, irb_region,
intel_region_buffer(intel, irb_region,
all ? INTEL_WRITE_FULL :
INTEL_WRITE_PART);

4
src/mesa/drivers/dri/intel/intel_buffer_objects.c
View File

@@ -40,7 +40,7 @@ static void
intel_bufferobj_alloc_buffer(struct intel_context *intel,
struct intel_buffer_object *intel_obj)
{
intel_obj->buffer = dri_bo_alloc(intel->intelScreen->bufmgr, "bufferobj",
intel_obj->buffer = dri_bo_alloc(intel->bufmgr, "bufferobj",
intel_obj->Base.Size, 64,
DRM_BO_FLAG_MEM_LOCAL | DRM_BO_FLAG_CACHED | DRM_BO_FLAG_CACHED_MAPPED);
}
@@ -85,7 +85,7 @@ intel_bufferobj_cow(struct intel_context *intel,
struct intel_buffer_object *intel_obj)
{
assert(intel_obj->region);
intel_region_cow(intel->intelScreen, intel_obj->region);
intel_region_cow(intel, intel_obj->region);
}

2
src/mesa/drivers/dri/intel/intel_bufmgr_ttm.c
View File

@@ -560,6 +560,8 @@ intel_ttm_bo_create_from_handle(dri_bufmgr *bufmgr, const char *name,
ret = drmBOReference(ttm_bufmgr->fd, handle, &ttm_buf->drm_bo);
if (ret != 0) {
fprintf(stderr, "Couldn't reference %s handle 0x%08x: %s\n",
name, handle, strerror(-ret));
free(ttm_buf);
return NULL;
}

8
src/mesa/drivers/dri/intel/intel_depthstencil.c
View File

@@ -95,12 +95,12 @@ map_regions(GLcontext * ctx,
{
struct intel_context *intel = intel_context(ctx);
if (depthRb && depthRb->region) {
intel_region_map(intel->intelScreen, depthRb->region);
intel_region_map(intel, depthRb->region);
depthRb->pfMap = depthRb->region->map;
depthRb->pfPitch = depthRb->region->pitch;
}
if (stencilRb && stencilRb->region) {
intel_region_map(intel->intelScreen, stencilRb->region);
intel_region_map(intel, stencilRb->region);
stencilRb->pfMap = stencilRb->region->map;
stencilRb->pfPitch = stencilRb->region->pitch;
}
@@ -113,12 +113,12 @@ unmap_regions(GLcontext * ctx,
{
struct intel_context *intel = intel_context(ctx);
if (depthRb && depthRb->region) {
intel_region_unmap(intel->intelScreen, depthRb->region);
intel_region_unmap(intel, depthRb->region);
depthRb->pfMap = NULL;
depthRb->pfPitch = 0;
}
if (stencilRb && stencilRb->region) {
intel_region_unmap(intel->intelScreen, stencilRb->region);
intel_region_unmap(intel, stencilRb->region);
stencilRb->pfMap = NULL;
stencilRb->pfPitch = 0;
}

2
src/mesa/drivers/dri/intel/intel_fbo.c
View File

@@ -282,7 +282,7 @@ intel_alloc_renderbuffer_storage(GLcontext * ctx, struct gl_renderbuffer *rb,
DBG("Allocating %d x %d Intel RBO (pitch %d)\n", width,
height, pitch);
irb->region = intel_region_alloc(intel->intelScreen, cpp, pitch, height);
irb->region = intel_region_alloc(intel, cpp, pitch, height);
if (!irb->region)
return GL_FALSE; /* out of memory? */

12
src/mesa/drivers/dri/intel/intel_mipmap_tree.c
View File

@@ -101,7 +101,7 @@ intel_miptree_create(struct intel_context *intel,
if (!mt->compressed) {
int align;
if (intel->intelScreen->ttm) {
if (intel->ttm) {
/* XXX: Align pitch to multiple of 64 bytes for now to allow
* render-to-texture to work in all cases. This should probably be
* replaced at some point by some scheme to only do this when really
@@ -124,7 +124,7 @@ intel_miptree_create(struct intel_context *intel,
mt->pitch /= cpp;
}
mt->region = intel_region_alloc(intel->intelScreen,
mt->region = intel_region_alloc(intel,
mt->cpp, mt->pitch, mt->total_height);
}
@@ -305,7 +305,7 @@ intel_miptree_image_map(struct intel_context * intel,
memcpy(image_offsets, mt->level[level].image_offset,
mt->level[level].depth * sizeof(GLuint));
return (intel_region_map(intel->intelScreen, mt->region) +
return (intel_region_map(intel, mt->region) +
intel_miptree_image_offset(mt, face, level));
}
@@ -314,7 +314,7 @@ intel_miptree_image_unmap(struct intel_context *intel,
struct intel_mipmap_tree *mt)
{
DBG("%s\n", __FUNCTION__);
intel_region_unmap(intel->intelScreen, mt->region);
intel_region_unmap(intel, mt->region);
}
@@ -340,7 +340,7 @@ intel_miptree_image_data(struct intel_context *intel,
height = dst->level[level].height;
if(dst->compressed)
height /= 4;
intel_region_data(intel->intelScreen, dst->region,
intel_region_data(intel, dst->region,
dst_offset + dst_depth_offset[i], /* dst_offset */
0, 0, /* dstx, dsty */
src,
@@ -377,7 +377,7 @@ intel_miptree_image_copy(struct intel_context *intel,
}
for (i = 0; i < depth; i++) {
intel_region_copy(intel->intelScreen,
intel_region_copy(intel,
dst->region, dst_offset + dst_depth_offset[i],
0,
0,

220
src/mesa/drivers/dri/intel/intel_regions.c
View File

@@ -50,7 +50,7 @@
#define FILE_DEBUG_FLAG DEBUG_REGION
void
intel_region_idle(intelScreenPrivate *intelScreen, struct intel_region *region)
intel_region_idle(struct intel_context *intel, struct intel_region *region)
{
DBG("%s\n", __FUNCTION__);
/* XXX: Using this function is likely bogus -- it ought to only have been
@@ -69,12 +69,12 @@ intel_region_idle(intelScreenPrivate *intelScreen, struct intel_region *region)
/* XXX: Thread safety?
*/
GLubyte *
intel_region_map(intelScreenPrivate *intelScreen, struct intel_region *region)
intel_region_map(struct intel_context *intel, struct intel_region *region)
{
DBG("%s\n", __FUNCTION__);
if (!region->map_refcount++) {
if (region->pbo)
intel_region_cow(intelScreen, region);
intel_region_cow(intel, region);
dri_bo_map(region->buffer, GL_TRUE);
region->map = region->buffer->virtual;
@@ -84,7 +84,7 @@ intel_region_map(intelScreenPrivate *intelScreen, struct intel_region *region)
}
void
intel_region_unmap(intelScreenPrivate *intelScreen, struct intel_region *region)
intel_region_unmap(struct intel_context *intel, struct intel_region *region)
{
DBG("%s\n", __FUNCTION__);
if (!--region->map_refcount) {
@@ -94,7 +94,7 @@ intel_region_unmap(intelScreenPrivate *intelScreen, struct intel_region *region)
}
struct intel_region *
intel_region_alloc(intelScreenPrivate *intelScreen,
intel_region_alloc(struct intel_context *intel,
GLuint cpp, GLuint pitch, GLuint height)
{
struct intel_region *region = calloc(sizeof(*region), 1);
@@ -106,7 +106,7 @@ intel_region_alloc(intelScreenPrivate *intelScreen,
region->height = height; /* needed? */
region->refcount = 1;
region->buffer = dri_bo_alloc(intelScreen->bufmgr, "region",
region->buffer = dri_bo_alloc(intel->bufmgr, "region",
pitch * cpp * height, 64, DRM_BO_FLAG_MEM_TT);
return region;
}
@@ -144,84 +144,6 @@ intel_region_release(struct intel_region **region)
*region = NULL;
}
struct intel_region *
intel_region_create_static(intelScreenPrivate *intelScreen,
const char *name,
GLuint mem_type,
unsigned int bo_handle,
GLuint offset,
void *virtual,
GLuint cpp, GLuint pitch, GLuint height,
GLboolean tiled)
{
struct intel_region *region = calloc(sizeof(*region), 1);
DBG("%s\n", __FUNCTION__);
region->cpp = cpp;
region->pitch = pitch;
region->height = height; /* needed? */
region->refcount = 1;
region->tiled = tiled;
if (intelScreen->ttm) {
assert(bo_handle != -1);
region->buffer = intel_ttm_bo_create_from_handle(intelScreen->bufmgr,
name,
bo_handle);
} else {
region->buffer = dri_bo_alloc_static(intelScreen->bufmgr,
name,
offset, pitch * cpp * height,
virtual,
DRM_BO_FLAG_MEM_TT);
}
return region;
}
void
intel_region_update_static(intelScreenPrivate *intelScreen,
struct intel_region *region,
const char *name,
GLuint mem_type,
unsigned int bo_handle,
GLuint offset,
void *virtual,
GLuint cpp, GLuint pitch, GLuint height,
GLboolean tiled)
{
DBG("%s\n", __FUNCTION__);
region->cpp = cpp;
region->pitch = pitch;
region->height = height; /* needed? */
region->tiled = tiled;
/*
* We use a "shared" buffer type to indicate buffers created and
* shared by others.
*/
dri_bo_unreference(region->buffer);
if (intelScreen->ttm) {
assert(bo_handle != -1);
region->buffer = intel_ttm_bo_create_from_handle(intelScreen->bufmgr,
name,
bo_handle);
} else {
region->buffer = dri_bo_alloc_static(intelScreen->bufmgr,
name,
offset, pitch * cpp * height,
virtual,
DRM_BO_FLAG_MEM_TT);
}
}
/*
* XXX Move this into core Mesa?
*/
@@ -266,15 +188,13 @@ _mesa_copy_rect(GLubyte * dst,
* Currently always memcpy.
*/
void
intel_region_data(intelScreenPrivate *intelScreen,
intel_region_data(struct intel_context *intel,
struct intel_region *dst,
GLuint dst_offset,
GLuint dstx, GLuint dsty,
const void *src, GLuint src_pitch,
GLuint srcx, GLuint srcy, GLuint width, GLuint height)
{
struct intel_context *intel = intelScreenContext(intelScreen);
DBG("%s\n", __FUNCTION__);
if (intel == NULL)
@@ -283,20 +203,20 @@ intel_region_data(intelScreenPrivate *intelScreen,
if (dst->pbo) {
if (dstx == 0 &&
dsty == 0 && width == dst->pitch && height == dst->height)
intel_region_release_pbo(intelScreen, dst);
intel_region_release_pbo(intel, dst);
else
intel_region_cow(intelScreen, dst);
intel_region_cow(intel, dst);
}
LOCK_HARDWARE(intel);
_mesa_copy_rect(intel_region_map(intelScreen, dst) + dst_offset,
_mesa_copy_rect(intel_region_map(intel, dst) + dst_offset,
dst->cpp,
dst->pitch,
dstx, dsty, width, height, src, src_pitch, srcx, srcy);
intel_region_unmap(intelScreen, dst);
intel_region_unmap(intel, dst);
UNLOCK_HARDWARE(intel);
@@ -306,7 +226,7 @@ intel_region_data(intelScreenPrivate *intelScreen,
* push buffers into AGP - will currently do so whenever possible.
*/
void
intel_region_copy(intelScreenPrivate *intelScreen,
intel_region_copy(struct intel_context *intel,
struct intel_region *dst,
GLuint dst_offset,
GLuint dstx, GLuint dsty,
@@ -314,8 +234,6 @@ intel_region_copy(intelScreenPrivate *intelScreen,
GLuint src_offset,
GLuint srcx, GLuint srcy, GLuint width, GLuint height)
{
struct intel_context *intel = intelScreenContext(intelScreen);
DBG("%s\n", __FUNCTION__);
if (intel == NULL)
@@ -324,9 +242,9 @@ intel_region_copy(intelScreenPrivate *intelScreen,
if (dst->pbo) {
if (dstx == 0 &&
dsty == 0 && width == dst->pitch && height == dst->height)
intel_region_release_pbo(intelScreen, dst);
intel_region_release_pbo(intel, dst);
else
intel_region_cow(intelScreen, dst);
intel_region_cow(intel, dst);
}
assert(src->cpp == dst->cpp);
@@ -343,14 +261,12 @@ intel_region_copy(intelScreenPrivate *intelScreen,
* push buffers into AGP - will currently do so whenever possible.
*/
void
intel_region_fill(intelScreenPrivate *intelScreen,
intel_region_fill(struct intel_context *intel,
struct intel_region *dst,
GLuint dst_offset,
GLuint dstx, GLuint dsty,
GLuint width, GLuint height, GLuint color)
{
struct intel_context *intel = intelScreenContext(intelScreen);
DBG("%s\n", __FUNCTION__);
if (intel == NULL)
@@ -359,9 +275,9 @@ intel_region_fill(intelScreenPrivate *intelScreen,
if (dst->pbo) {
if (dstx == 0 &&
dsty == 0 && width == dst->pitch && height == dst->height)
intel_region_release_pbo(intelScreen, dst);
intel_region_release_pbo(intel, dst);
else
intel_region_cow(intelScreen, dst);
intel_region_cow(intel, dst);
}
intelEmitFillBlit(intel,
@@ -374,7 +290,7 @@ intel_region_fill(intelScreenPrivate *intelScreen,
* the pbo's data.
*/
void
intel_region_attach_pbo(intelScreenPrivate *intelScreen,
intel_region_attach_pbo(struct intel_context *intel,
struct intel_region *region,
struct intel_buffer_object *pbo)
{
@@ -407,7 +323,7 @@ intel_region_attach_pbo(intelScreenPrivate *intelScreen,
* The pbo gets to keep the data.
*/
void
intel_region_release_pbo(intelScreenPrivate *intelScreen,
intel_region_release_pbo(struct intel_context *intel,
struct intel_region *region)
{
assert(region->buffer == region->pbo->buffer);
@@ -416,7 +332,7 @@ intel_region_release_pbo(intelScreenPrivate *intelScreen,
dri_bo_unreference(region->buffer);
region->buffer = NULL;
region->buffer = dri_bo_alloc(intelScreen->bufmgr, "region",
region->buffer = dri_bo_alloc(intel->bufmgr, "region",
region->pitch * region->cpp * region->height,
64, DRM_BO_FLAG_MEM_TT);
}
@@ -425,16 +341,15 @@ intel_region_release_pbo(intelScreenPrivate *intelScreen,
* with a copy of the data.
*/
void
intel_region_cow(intelScreenPrivate *intelScreen, struct intel_region *region)
intel_region_cow(struct intel_context *intel, struct intel_region *region)
{
struct intel_context *intel = intelScreenContext(intelScreen);
struct intel_buffer_object *pbo = region->pbo;
GLboolean was_locked = intel->locked;
if (intel == NULL)
return;
intel_region_release_pbo(intelScreen, region);
intel_region_release_pbo(intel, region);
assert(region->cpp * region->pitch * region->height == pbo->Base.Size);
@@ -464,15 +379,100 @@ intel_region_cow(intelScreenPrivate *intelScreen, struct intel_region *region)
}
dri_bo *
intel_region_buffer(intelScreenPrivate *intelScreen,
intel_region_buffer(struct intel_context *intel,
struct intel_region *region, GLuint flag)
{
if (region->pbo) {
if (flag == INTEL_WRITE_PART)
intel_region_cow(intelScreen, region);
intel_region_cow(intel, region);
else if (flag == INTEL_WRITE_FULL)
intel_region_release_pbo(intelScreen, region);
intel_region_release_pbo(intel, region);
}
return region->buffer;
}
static struct intel_region *
intel_recreate_static(struct intel_context *intel,
const char *name,
struct intel_region *region,
intelRegion *region_desc,
GLuint mem_type)
{
intelScreenPrivate *intelScreen = intel->intelScreen;
if (region == NULL) {
region = calloc(sizeof(*region), 1);
region->refcount = 1;
}
region->cpp = intelScreen->cpp;
region->pitch = region_desc->pitch / intelScreen->cpp;
region->height = intelScreen->height; /* needed? */
region->tiled = region_desc->tiled;
if (intel->ttm) {
assert(region_desc->bo_handle != -1);
region->buffer = intel_ttm_bo_create_from_handle(intel->bufmgr,
name,
region_desc->bo_handle);
} else {
region->buffer = dri_bo_alloc_static(intel->bufmgr,
name,
region_desc->offset,
region_desc->pitch *
intelScreen->height,
region_desc->map,
DRM_BO_FLAG_MEM_TT);
}
assert(region->buffer != NULL);
return region;
}
/**
* Create intel_region structs to describe the static front, back, and depth
* buffers created by the xserver.
*
* Although FBO's mean we now no longer use these as render targets in
* all circumstances, they won't go away until the back and depth
* buffers become private, and the front buffer will remain even then.
*
* Note that these don't allocate video memory, just describe
* allocations alread made by the X server.
*/
void
intel_recreate_static_regions(struct intel_context *intel)
{
intelScreenPrivate *intelScreen = intel->intelScreen;
intel->front_region =
intel_recreate_static(intel, "front",
intel->front_region,
&intelScreen->front,
DRM_BO_FLAG_MEM_TT);
intel->back_region =
intel_recreate_static(intel, "back",
intel->back_region,
&intelScreen->back,
DRM_BO_FLAG_MEM_TT);
if (intelScreen->third.handle) {
intel->third_region =
intel_recreate_static(intel, "third",
intel->third_region,
&intelScreen->third,
DRM_BO_FLAG_MEM_TT);
}
/* Still assumes front.cpp == depth.cpp. We can kill this when we move to
* private buffers.
*/
intel->depth_region =
intel_recreate_static(intel, "depth",
intel->depth_region,
&intelScreen->depth,
DRM_BO_FLAG_MEM_TT);
}

45
src/mesa/drivers/dri/intel/intel_regions.h
View File

@@ -29,7 +29,7 @@
#define INTEL_REGIONS_H
#include "mtypes.h"
#include "intel_screen.h"
#include "dri_bufmgr.h"
struct intel_context;
struct intel_buffer_object;
@@ -62,7 +62,7 @@ struct intel_region
/* Allocate a refcounted region. Pointers to regions should only be
* copied by calling intel_reference_region().
*/
struct intel_region *intel_region_alloc(intelScreenPrivate *intelScreen,
struct intel_region *intel_region_alloc(struct intel_context *intel,
GLuint cpp,
GLuint pitch, GLuint height);
@@ -71,41 +71,22 @@ void intel_region_reference(struct intel_region **dst,
void intel_region_release(struct intel_region **ib);
extern struct intel_region
*intel_region_create_static(intelScreenPrivate *intelScreen,
const char *name,
GLuint mem_type,
unsigned int bo_handle,
GLuint offset,
void *virtual,
GLuint cpp,
GLuint pitch, GLuint height, GLboolean tiled);
extern void
intel_region_update_static(intelScreenPrivate *intelScreen,
struct intel_region *region,
const char *name,
GLuint mem_type,
unsigned int bo_handle,
GLuint offset,
void *virtual,
GLuint cpp, GLuint pitch, GLuint height,
GLboolean tiled);
void intel_recreate_static_regions(struct intel_context *intel);
void intel_region_idle(intelScreenPrivate *intelScreen,
void intel_region_idle(struct intel_context *intel,
struct intel_region *ib);
/* Map/unmap regions. This is refcounted also:
*/
GLubyte *intel_region_map(intelScreenPrivate *intelScreen,
GLubyte *intel_region_map(struct intel_context *intel,
struct intel_region *ib);
void intel_region_unmap(intelScreenPrivate *intelScreen, struct intel_region *ib);
void intel_region_unmap(struct intel_context *intel, struct intel_region *ib);
/* Upload data to a rectangular sub-region
*/
void intel_region_data(intelScreenPrivate *intelScreen,
void intel_region_data(struct intel_context *intel,
struct intel_region *dest,
GLuint dest_offset,
GLuint destx, GLuint desty,
@@ -114,7 +95,7 @@ void intel_region_data(intelScreenPrivate *intelScreen,
/* Copy rectangular sub-regions
*/
void intel_region_copy(intelScreenPrivate *intelScreen,
void intel_region_copy(struct intel_context *intel,
struct intel_region *dest,
GLuint dest_offset,
GLuint destx, GLuint desty,
@@ -124,7 +105,7 @@ void intel_region_copy(intelScreenPrivate *intelScreen,
/* Fill a rectangular sub-region
*/
void intel_region_fill(intelScreenPrivate *intelScreen,
void intel_region_fill(struct intel_context *intel,
struct intel_region *dest,
GLuint dest_offset,
GLuint destx, GLuint desty,
@@ -132,15 +113,15 @@ void intel_region_fill(intelScreenPrivate *intelScreen,
/* Helpers for zerocopy uploads, particularly texture image uploads:
*/
void intel_region_attach_pbo(intelScreenPrivate *intelScreen,
void intel_region_attach_pbo(struct intel_context *intel,
struct intel_region *region,
struct intel_buffer_object *pbo);
void intel_region_release_pbo(intelScreenPrivate *intelScreen,
void intel_region_release_pbo(struct intel_context *intel,
struct intel_region *region);
void intel_region_cow(intelScreenPrivate *intelScreen,
void intel_region_cow(struct intel_context *intel,
struct intel_region *region);
dri_bo *intel_region_buffer(intelScreenPrivate *intelScreen,
dri_bo *intel_region_buffer(struct intel_context *intel,
struct intel_region *region,
GLuint flag);

142
src/mesa/drivers/dri/intel/intel_screen.c
View File

@@ -46,12 +46,9 @@
#include "intel_fbo.h"
#include "i830_dri.h"
#include "dri_bufmgr.h"
#include "intel_regions.h"
#include "intel_batchbuffer.h"
#include "intel_bufmgr_ttm.h"
PUBLIC const char __driConfigOptions[] =
DRI_CONF_BEGIN DRI_CONF_SECTION_PERFORMANCE
DRI_CONF_FTHROTTLE_MODE(DRI_CONF_FTHROTTLE_IRQS)
@@ -143,105 +140,6 @@ intelMapScreenRegions(__DRIscreenPrivate * sPriv)
return GL_TRUE;
}
/** Driver-specific fence emit implementation for the fake memory manager. */
static unsigned int
intel_fence_emit(void *private)
{
intelScreenPrivate *intelScreen = (intelScreenPrivate *)private;
unsigned int fence;
/* XXX: Need to emit a flush, if we haven't already (at least with the
* current batchbuffer implementation, we have).
*/
fence = intelEmitIrqLocked(intelScreen);
return fence;
}
/** Driver-specific fence wait implementation for the fake memory manager. */
static int
intel_fence_wait(void *private, unsigned int cookie)
{
intelScreenPrivate *intelScreen = (intelScreenPrivate *)private;
intelWaitIrq(intelScreen, cookie);
return 0;
}
static struct intel_region *
intel_recreate_static(intelScreenPrivate *intelScreen,
const char *name,
struct intel_region *region,
intelRegion *region_desc,
GLuint mem_type)
{
if (region) {
intel_region_update_static(intelScreen, region, name, mem_type,
region_desc->bo_handle, region_desc->offset,
region_desc->map, intelScreen->cpp,
region_desc->pitch / intelScreen->cpp,
intelScreen->height, region_desc->tiled);
} else {
region = intel_region_create_static(intelScreen, name, mem_type,
region_desc->bo_handle,
region_desc->offset,
region_desc->map, intelScreen->cpp,
region_desc->pitch / intelScreen->cpp,
intelScreen->height,
region_desc->tiled);
}
assert(region->buffer != NULL);
return region;
}
/* Create intel_region structs to describe the static front,back,depth
* buffers created by the xserver.
*
* Although FBO's mean we now no longer use these as render targets in
* all circumstances, they won't go away until the back and depth
* buffers become private, and the front buffer will remain even then.
*
* Note that these don't allocate video memory, just describe
* allocations alread made by the X server.
*/
static void
intel_recreate_static_regions(intelScreenPrivate *intelScreen)
{
intelScreen->front_region =
intel_recreate_static(intelScreen, "front",
intelScreen->front_region,
&intelScreen->front,
DRM_BO_FLAG_MEM_TT);
intelScreen->back_region =
intel_recreate_static(intelScreen, "back",
intelScreen->back_region,
&intelScreen->back,
DRM_BO_FLAG_MEM_TT);
if (intelScreen->third.handle) {
intelScreen->third_region =
intel_recreate_static(intelScreen, "third",
intelScreen->third_region,
&intelScreen->third,
DRM_BO_FLAG_MEM_TT);
}
/* Still assumes front.cpp == depth.cpp. We can kill this when we move to
* private buffers.
*/
intelScreen->depth_region =
intel_recreate_static(intelScreen, "depth",
intelScreen->depth_region,
&intelScreen->depth,
DRM_BO_FLAG_MEM_TT);
}
void
intelUnmapScreenRegions(intelScreenPrivate * intelScreen)
{
@@ -426,10 +324,6 @@ static GLboolean intelInitDriver(__DRIscreenPrivate *sPriv)
(((GLubyte *) sPriv->pSAREA) + intelScreen->sarea_priv_offset);
intelScreen->deviceID = gDRIPriv->deviceID;
if (intelScreen->deviceID == PCI_CHIP_I865_G)
intelScreen->maxBatchSize = 4096;
else
intelScreen->maxBatchSize = BATCH_SZ;
intelScreen->mem = gDRIPriv->mem;
intelScreen->cpp = gDRIPriv->cpp;
@@ -496,41 +390,6 @@ static GLboolean intelInitDriver(__DRIscreenPrivate *sPriv)
sPriv->extensions = intelExtensions;
/* If we've got a new enough DDX that's initializing TTM and giving us
* object handles for the shared buffers, use that.
*/
intelScreen->ttm = GL_FALSE;
if (getenv("INTEL_NO_TTM") == NULL &&
intelScreen->driScrnPriv->ddx_version.minor >= 9 &&
intelScreen->drmMinor >= 11 &&
intelScreen->front.bo_handle != -1) {
intelScreen->bufmgr = intel_bufmgr_ttm_init(sPriv->fd,
DRM_FENCE_TYPE_EXE,
DRM_FENCE_TYPE_EXE |
DRM_I915_FENCE_TYPE_RW,
BATCH_SZ);
if (intelScreen->bufmgr != NULL)
intelScreen->ttm = GL_TRUE;
}
/* Otherwise, use the classic buffer manager. */
if (intelScreen->bufmgr == NULL) {
if (intelScreen->tex.size == 0) {
fprintf(stderr, "[%s:%u] Error initializing buffer manager.\n",
__func__, __LINE__);
return GL_FALSE;
}
fprintf(stderr, "[%s:%u] Failed to init TTM buffer manager, falling back"
" to classic.\n", __func__, __LINE__);
intelScreen->bufmgr = dri_bufmgr_fake_init(intelScreen->tex.offset,
intelScreen->tex.map,
intelScreen->tex.size,
intel_fence_emit,
intel_fence_wait,
intelScreen);
}
intel_recreate_static_regions(intelScreen);
return GL_TRUE;
}
@@ -542,7 +401,6 @@ intelDestroyScreen(__DRIscreenPrivate * sPriv)
intelUnmapScreenRegions(intelScreen);
dri_bufmgr_destroy(intelScreen->bufmgr);
FREE(intelScreen);
sPriv->private = NULL;
}

17
src/mesa/drivers/dri/intel/intel_screen.h
View File

@@ -32,7 +32,6 @@
#include "dri_util.h"
#include "i830_common.h"
#include "xmlconfig.h"
#include "dri_bufmgr.h"
/* XXX: change name or eliminate to avoid conflict with "struct
* intel_region"!!!
@@ -61,11 +60,6 @@ typedef struct
intelRegion depth;
intelRegion tex;
struct intel_region *front_region;
struct intel_region *back_region;
struct intel_region *third_region;
struct intel_region *depth_region;
int deviceID;
int width;
int height;
@@ -89,17 +83,6 @@ typedef struct
* Configuration cache with default values for all contexts
*/
driOptionCache optionCache;
dri_bufmgr *bufmgr;
unsigned int maxBatchSize;
/**
* This value indicates that the kernel memory manager is being used
* instead of the fake client-side memory manager.
*/
GLboolean ttm;
unsigned batch_id;
} intelScreenPrivate;

24
src/mesa/drivers/dri/intel/intel_span.c
View File

@@ -195,9 +195,9 @@ intel_map_unmap_buffers(struct intel_context *intel, GLboolean map)
/* this is a user-created intel_renderbuffer */
if (irb->region) {
if (map)
intel_region_map(intel->intelScreen, irb->region);
intel_region_map(intel, irb->region);
else
intel_region_unmap(intel->intelScreen, irb->region);
intel_region_unmap(intel, irb->region);
irb->pfMap = irb->region->map;
irb->pfPitch = irb->region->pitch;
}
@@ -228,9 +228,9 @@ intel_map_unmap_buffers(struct intel_context *intel, GLboolean map)
irb = intel_renderbuffer(ctx->ReadBuffer->_ColorReadBuffer);
if (irb && irb->region) {
if (map)
intel_region_map(intel->intelScreen, irb->region);
intel_region_map(intel, irb->region);
else
intel_region_unmap(intel->intelScreen, irb->region);
intel_region_unmap(intel, irb->region);
irb->pfMap = irb->region->map;
irb->pfPitch = irb->region->pitch;
}
@@ -269,12 +269,12 @@ intel_map_unmap_buffers(struct intel_context *intel, GLboolean map)
irb = intel_renderbuffer(ctx->DrawBuffer->_DepthBuffer->Wrapped);
if (irb && irb->region && irb->Base.Name != 0) {
if (map) {
intel_region_map(intel->intelScreen, irb->region);
intel_region_map(intel, irb->region);
irb->pfMap = irb->region->map;
irb->pfPitch = irb->region->pitch;
}
else {
intel_region_unmap(intel->intelScreen, irb->region);
intel_region_unmap(intel, irb->region);
irb->pfMap = NULL;
irb->pfPitch = 0;
}
@@ -286,12 +286,12 @@ intel_map_unmap_buffers(struct intel_context *intel, GLboolean map)
irb = intel_renderbuffer(ctx->DrawBuffer->_StencilBuffer->Wrapped);
if (irb && irb->region && irb->Base.Name != 0) {
if (map) {
intel_region_map(intel->intelScreen, irb->region);
intel_region_map(intel, irb->region);
irb->pfMap = irb->region->map;
irb->pfPitch = irb->region->pitch;
}
else {
intel_region_unmap(intel->intelScreen, irb->region);
intel_region_unmap(intel, irb->region);
irb->pfMap = NULL;
irb->pfPitch = 0;
}
@@ -320,9 +320,9 @@ intelSpanRenderStart(GLcontext * ctx)
/* Just map the framebuffer and all textures. Bufmgr code will
* take care of waiting on the necessary fences:
*/
intel_region_map(intel->intelScreen, intel->front_region);
intel_region_map(intel->intelScreen, intel->back_region);
intel_region_map(intel->intelScreen, intel->intelScreen->depth_region);
intel_region_map(intel, intel->front_region);
intel_region_map(intel, intel->back_region);
intel_region_map(intel, intel->depth_region);
#endif
for (i = 0; i < ctx->Const.MaxTextureCoordUnits; i++) {
@@ -352,7 +352,7 @@ intelSpanRenderFinish(GLcontext * ctx)
#if 0
intel_region_unmap(intel, intel->front_region);
intel_region_unmap(intel, intel->back_region);
intel_region_unmap(intel, intel->intelScreen->depth_region);
intel_region_unmap(intel, intel->depth_region);
#endif
for (i = 0; i < ctx->Const.MaxTextureCoordUnits; i++) {

6
src/mesa/drivers/dri/intel/intel_tex_image.c
View File

@@ -222,7 +222,7 @@ try_pbo_upload(struct intel_context *intel,
LOCK_HARDWARE(intel);
{
dri_bo *src_buffer = intel_bufferobj_buffer(intel, pbo, INTEL_READ);
dri_bo *dst_buffer = intel_region_buffer(intel->intelScreen,
dri_bo *dst_buffer = intel_region_buffer(intel,
intelImage->mt->region,
INTEL_WRITE_FULL);
@@ -280,7 +280,7 @@ try_pbo_zcopy(struct intel_context *intel,
return GL_FALSE;
}
intel_region_attach_pbo(intel->intelScreen, intelImage->mt->region, pbo);
intel_region_attach_pbo(intel, intelImage->mt->region, pbo);
return GL_TRUE;
}
@@ -459,7 +459,7 @@ intelTexImage(GLcontext * ctx,
if (intelImage->mt)
intel_region_idle(intel->intelScreen, intelImage->mt->region);
intel_region_idle(intel, intelImage->mt->region);
LOCK_HARDWARE(intel);

2
src/mesa/drivers/dri/intel/intel_tex_subimage.c
View File

@@ -65,7 +65,7 @@ intelTexSubimage(GLcontext * ctx,
return;
if (intelImage->mt)
intel_region_idle(intel->intelScreen, intelImage->mt->region);
intel_region_idle(intel, intelImage->mt->region);
LOCK_HARDWARE(intel);