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radv: upload the PS epilog in the existing pipeline BO

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This reduces the number of BOs needed.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18363>
This commit is contained in:
Samuel Pitoiset
2022-09-01 12:18:54 +02:00
committed by Marge Bot
parent 36d9fc5b5f
commit 7c34b31db2
3 changed files with 23 additions and 24 deletions
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19
src/amd/vulkan/radv_pipeline.c
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@@ -3107,8 +3107,14 @@ non_uniform_access_callback(const nir_src *src, void *_)
VkResult
radv_upload_shaders(struct radv_device *device, struct radv_pipeline *pipeline)
{
struct radv_shader_part *ps_epilog = NULL;
uint32_t code_size = 0;
if (pipeline->type == RADV_PIPELINE_GRAPHICS) {
struct radv_graphics_pipeline *graphics_pipeline = radv_pipeline_to_graphics(pipeline);
ps_epilog = graphics_pipeline->ps_epilog;
}
/* Compute the total code size. */
for (int i = 0; i < MESA_VULKAN_SHADER_STAGES; i++) {
struct radv_shader *shader = pipeline->shaders[i];
@@ -3122,6 +3128,10 @@ radv_upload_shaders(struct radv_device *device, struct radv_pipeline *pipeline)
code_size += align(pipeline->gs_copy_shader->code_size, RADV_SHADER_ALLOC_ALIGNMENT);
}
if (ps_epilog) {
code_size += align(ps_epilog->code_size, RADV_SHADER_ALLOC_ALIGNMENT);
}
/* Allocate memory for all shader binaries. */
pipeline->slab = radv_pipeline_slab_create(device, pipeline, code_size);
if (!pipeline->slab)
@@ -3155,6 +3165,15 @@ radv_upload_shaders(struct radv_device *device, struct radv_pipeline *pipeline)
if (!radv_shader_binary_upload(device, pipeline->gs_copy_shader->binary,
pipeline->gs_copy_shader, dest_ptr))
return VK_ERROR_OUT_OF_HOST_MEMORY;
slab_offset += align(pipeline->gs_copy_shader->code_size, RADV_SHADER_ALLOC_ALIGNMENT);
}
if (ps_epilog) {
ps_epilog->va = slab_va + slab_offset;
void *dest_ptr = slab_ptr + slab_offset;
radv_shader_part_binary_upload(ps_epilog->binary, dest_ptr);
}
return VK_SUCCESS;