From 7c34b31db25e71625c78bf232c543caad84dda55 Mon Sep 17 00:00:00 2001 From: Samuel Pitoiset Date: Thu, 1 Sep 2022 12:18:54 +0200 Subject: [PATCH] radv: upload the PS epilog in the existing pipeline BO This reduces the number of BOs needed. Signed-off-by: Samuel Pitoiset Reviewed-by: Bas Nieuwenhuizen Part-of: --- src/amd/vulkan/radv_cmd_buffer.c | 2 -- src/amd/vulkan/radv_pipeline.c | 19 +++++++++++++++++++ src/amd/vulkan/radv_shader.c | 26 ++++---------------------- 3 files changed, 23 insertions(+), 24 deletions(-) diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c index 680c0bb82f4..0bce238ba02 100644 --- a/src/amd/vulkan/radv_cmd_buffer.c +++ b/src/amd/vulkan/radv_cmd_buffer.c @@ -1405,8 +1405,6 @@ radv_emit_ps_epilog(struct radv_cmd_buffer *cmd_buffer) */ assert(G_00B848_VGPRS(ps_shader->config.rsrc1) >= G_00B848_VGPRS(ps_epilog->rsrc1)); - radv_cs_add_buffer(cmd_buffer->device->ws, cmd_buffer->cs, ps_epilog->bo); - assert((ps_epilog->va >> 32) == cmd_buffer->device->physical_device->rad_info.address32_hi); struct radv_userdata_info *loc = diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c index 5fc1f9afcd0..108cbbe43a0 100644 --- a/src/amd/vulkan/radv_pipeline.c +++ b/src/amd/vulkan/radv_pipeline.c @@ -3107,8 +3107,14 @@ non_uniform_access_callback(const nir_src *src, void *_) VkResult radv_upload_shaders(struct radv_device *device, struct radv_pipeline *pipeline) { + struct radv_shader_part *ps_epilog = NULL; uint32_t code_size = 0; + if (pipeline->type == RADV_PIPELINE_GRAPHICS) { + struct radv_graphics_pipeline *graphics_pipeline = radv_pipeline_to_graphics(pipeline); + ps_epilog = graphics_pipeline->ps_epilog; + } + /* Compute the total code size. */ for (int i = 0; i < MESA_VULKAN_SHADER_STAGES; i++) { struct radv_shader *shader = pipeline->shaders[i]; @@ -3122,6 +3128,10 @@ radv_upload_shaders(struct radv_device *device, struct radv_pipeline *pipeline) code_size += align(pipeline->gs_copy_shader->code_size, RADV_SHADER_ALLOC_ALIGNMENT); } + if (ps_epilog) { + code_size += align(ps_epilog->code_size, RADV_SHADER_ALLOC_ALIGNMENT); + } + /* Allocate memory for all shader binaries. */ pipeline->slab = radv_pipeline_slab_create(device, pipeline, code_size); if (!pipeline->slab) @@ -3155,6 +3165,15 @@ radv_upload_shaders(struct radv_device *device, struct radv_pipeline *pipeline) if (!radv_shader_binary_upload(device, pipeline->gs_copy_shader->binary, pipeline->gs_copy_shader, dest_ptr)) return VK_ERROR_OUT_OF_HOST_MEMORY; + + slab_offset += align(pipeline->gs_copy_shader->code_size, RADV_SHADER_ALLOC_ALIGNMENT); + } + + if (ps_epilog) { + ps_epilog->va = slab_va + slab_offset; + + void *dest_ptr = slab_ptr + slab_offset; + radv_shader_part_binary_upload(ps_epilog->binary, dest_ptr); } return VK_SUCCESS; diff --git a/src/amd/vulkan/radv_shader.c b/src/amd/vulkan/radv_shader.c index 20984309d98..34d7b6c2a5f 100644 --- a/src/amd/vulkan/radv_shader.c +++ b/src/amd/vulkan/radv_shader.c @@ -2517,35 +2517,17 @@ radv_create_ps_epilog(struct radv_device *device, const struct radv_ps_epilog_ke (void **)&binary); epilog = radv_shader_part_create(binary, info.wave_size); - if (!epilog) - goto fail_create; - - /* Allocate memory and upload the epilog. */ - epilog->alloc = radv_alloc_shader_memory(device, epilog->code_size, NULL); - if (!epilog->alloc) - goto fail_alloc; - - epilog->bo = epilog->alloc->arena->bo; - epilog->va = radv_buffer_get_va(epilog->bo) + epilog->alloc->offset; - - void *dest_ptr = epilog->alloc->arena->ptr + epilog->alloc->offset; - radv_shader_part_binary_upload(binary, dest_ptr); + if (!epilog) { + free(binary); + return NULL; + } if (options.dump_shader) { fprintf(stderr, "Fragment epilog"); fprintf(stderr, "\ndisasm:\n%s\n", epilog->disasm_string); } - free(epilog->binary); - epilog->binary = NULL; - return epilog; - -fail_alloc: - radv_shader_part_destroy(device, epilog); -fail_create: - free(binary); - return NULL; } void