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radeonsi: remove redundant variables from struct si_compute

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Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6782>
This commit is contained in:
Marek Olšák
2020-09-17 19:43:41 -04:00
parent 16afaf0355
commit 7b1e01fec7
2 changed files with 11 additions and 19 deletions
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26
src/gallium/drivers/radeonsi/si_compute.c
View File

@@ -127,18 +127,14 @@ static void si_create_compute_state_async(void *job, int thread_index)
assert(program->ir_type == PIPE_SHADER_IR_NIR); assert(program->ir_type == PIPE_SHADER_IR_NIR);
si_nir_scan_shader(sel->nir, &sel->info); si_nir_scan_shader(sel->nir, &sel->info);
sel->info.base.cs.shared_size = program->local_size;
si_get_active_slot_masks(&sel->info, &sel->active_const_and_shader_buffers, si_get_active_slot_masks(&sel->info, &sel->active_const_and_shader_buffers,
&sel->active_samplers_and_images); &sel->active_samplers_and_images);
program->shader.is_monolithic = true; program->shader.is_monolithic = true;
program->reads_variable_block_size = sel->info.uses_variable_block_size;
program->num_cs_user_data_dwords =
sel->info.base.cs.user_data_components_amd;
unsigned user_sgprs = SI_NUM_RESOURCE_SGPRS + (sel->info.uses_grid_size ? 3 : 0) + unsigned user_sgprs = SI_NUM_RESOURCE_SGPRS + (sel->info.uses_grid_size ? 3 : 0) +
(program->reads_variable_block_size ? 3 : 0) + (sel->info.uses_variable_block_size ? 3 : 0) +
program->num_cs_user_data_dwords; sel->info.base.cs.user_data_components_amd;
/* Fast path for compute shaders - some descriptors passed via user SGPRs. */ /* Fast path for compute shaders - some descriptors passed via user SGPRs. */
/* Shader buffers in user SGPRs. */ /* Shader buffers in user SGPRs. */
@@ -237,9 +233,9 @@ static void *si_create_compute_state(struct pipe_context *ctx, const struct pipe
si_const_and_shader_buffer_descriptors_idx(PIPE_SHADER_COMPUTE); si_const_and_shader_buffer_descriptors_idx(PIPE_SHADER_COMPUTE);
sel->sampler_and_images_descriptors_index = sel->sampler_and_images_descriptors_index =
si_sampler_and_image_descriptors_idx(PIPE_SHADER_COMPUTE); si_sampler_and_image_descriptors_idx(PIPE_SHADER_COMPUTE);
sel->info.base.cs.shared_size = cso->req_local_mem;
program->shader.selector = &program->sel; program->shader.selector = &program->sel;
program->ir_type = cso->ir_type; program->ir_type = cso->ir_type;
program->local_size = cso->req_local_mem;
program->private_size = cso->req_private_mem; program->private_size = cso->req_private_mem;
program->input_size = cso->req_input_mem; program->input_size = cso->req_input_mem;
@@ -473,9 +469,9 @@ static bool si_switch_compute_shader(struct si_context *sctx, struct si_compute
* tracker, then we will set LDS_SIZE to 512 bytes rather than 256. * tracker, then we will set LDS_SIZE to 512 bytes rather than 256.
*/ */
if (sctx->chip_class <= GFX6) { if (sctx->chip_class <= GFX6) {
lds_blocks += align(program->local_size, 256) >> 8; lds_blocks += align(program->sel.info.base.cs.shared_size, 256) >> 8;
} else { } else {
lds_blocks += align(program->local_size, 512) >> 9; lds_blocks += align(program->sel.info.base.cs.shared_size, 512) >> 9;
} }
/* TODO: use si_multiwave_lds_size_workaround */ /* TODO: use si_multiwave_lds_size_workaround */
@@ -611,7 +607,7 @@ static void si_setup_user_sgprs_co_v2(struct si_context *sctx, const amd_kernel_
dispatch.grid_size_z = util_cpu_to_le32(info->grid[2] * info->block[2]); dispatch.grid_size_z = util_cpu_to_le32(info->grid[2] * info->block[2]);
dispatch.private_segment_size = util_cpu_to_le32(program->private_size); dispatch.private_segment_size = util_cpu_to_le32(program->private_size);
dispatch.group_segment_size = util_cpu_to_le32(program->local_size); dispatch.group_segment_size = util_cpu_to_le32(program->sel.info.base.cs.shared_size);
dispatch.kernarg_address = util_cpu_to_le64(kernel_args_va); dispatch.kernarg_address = util_cpu_to_le64(kernel_args_va);
@@ -695,7 +691,7 @@ static void si_setup_nir_user_data(struct si_context *sctx, const struct pipe_gr
unsigned block_size_reg = grid_size_reg + unsigned block_size_reg = grid_size_reg +
/* 12 bytes = 3 dwords. */ /* 12 bytes = 3 dwords. */
12 * sel->info.uses_grid_size; 12 * sel->info.uses_grid_size;
unsigned cs_user_data_reg = block_size_reg + 12 * program->reads_variable_block_size; unsigned cs_user_data_reg = block_size_reg + 12 * program->sel.info.uses_variable_block_size;
if (sel->info.uses_grid_size) { if (sel->info.uses_grid_size) {
if (info->indirect) { if (info->indirect) {
@@ -712,16 +708,16 @@ static void si_setup_nir_user_data(struct si_context *sctx, const struct pipe_gr
} }
} }
if (program->reads_variable_block_size) { if (sel->info.uses_variable_block_size) {
radeon_set_sh_reg_seq(cs, block_size_reg, 3); radeon_set_sh_reg_seq(cs, block_size_reg, 3);
radeon_emit(cs, info->block[0]); radeon_emit(cs, info->block[0]);
radeon_emit(cs, info->block[1]); radeon_emit(cs, info->block[1]);
radeon_emit(cs, info->block[2]); radeon_emit(cs, info->block[2]);
} }
if (program->num_cs_user_data_dwords) { if (sel->info.base.cs.user_data_components_amd) {
radeon_set_sh_reg_seq(cs, cs_user_data_reg, program->num_cs_user_data_dwords); radeon_set_sh_reg_seq(cs, cs_user_data_reg, sel->info.base.cs.user_data_components_amd);
radeon_emit_array(cs, sctx->cs_user_data, program->num_cs_user_data_dwords); radeon_emit_array(cs, sctx->cs_user_data, sel->info.base.cs.user_data_components_amd);
} }
} }

4
src/gallium/drivers/radeonsi/si_compute.h
View File

@@ -33,15 +33,11 @@ struct si_compute {
struct si_shader shader; struct si_shader shader;
unsigned ir_type; unsigned ir_type;
unsigned local_size;
unsigned private_size; unsigned private_size;
unsigned input_size; unsigned input_size;
int max_global_buffers; int max_global_buffers;
struct pipe_resource **global_buffers; struct pipe_resource **global_buffers;
bool reads_variable_block_size;
unsigned num_cs_user_data_dwords;
}; };
void si_destroy_compute(struct si_compute *program); void si_destroy_compute(struct si_compute *program);