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radv: stop setting CB_COLOR_CONTROL.ROP3 from the pipeline

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This is useless because logic op is a dynamic state and it's already
emitted from the cmdbuf.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18234>
This commit is contained in:
Samuel Pitoiset
2022-08-24 17:09:42 +02:00
committed by Marge Bot
parent b5c10a9028
commit 7aaa016b23
1 changed files with 0 additions and 7 deletions
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7
src/amd/vulkan/radv_pipeline.c
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@@ -678,13 +678,6 @@ radv_pipeline_init_blend_state(struct radv_graphics_pipeline *pipeline,
const enum amd_gfx_level gfx_level = device->physical_device->rad_info.gfx_level;
int i;
if (state->cb) {
if (state->cb->logic_op_enable)
cb_color_control |= S_028808_ROP3(si_translate_blend_logic_op(state->cb->logic_op));
else
cb_color_control |= S_028808_ROP3(V_028808_ROP3_COPY);
}
if (device->instance->debug_flags & RADV_DEBUG_NO_ATOC_DITHERING)
{
blend.db_alpha_to_mask = S_028B70_ALPHA_TO_MASK_OFFSET0(2) | S_028B70_ALPHA_TO_MASK_OFFSET1(2) |