radeonsi: allow out-of-order rasterization in commutative blending cases
We do not enable this by default for additive blending, since it slightly breaks OpenGL invariance guarantees due to non-determinism. Still, there may be some applications can benefit from white-listing via the radeonsi_commutative_blend_add drirc setting without any real visible artifacts. Reviewed-by: Marek Olšák <marek.olsak@amd.com> Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
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@@ -2,4 +2,5 @@
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DRI_CONF_SECTION_PERFORMANCE
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DRI_CONF_RADEONSI_ENABLE_SISCHED("false")
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DRI_CONF_RADEONSI_ASSUME_NO_Z_FIGHTS("false")
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DRI_CONF_RADEONSI_COMMUTATIVE_BLEND_ADD("false")
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DRI_CONF_SECTION_END
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@@ -1050,6 +1050,8 @@ struct pipe_screen *radeonsi_screen_create(struct radeon_winsys *ws,
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!(sscreen->b.debug_flags & DBG_NO_OUT_OF_ORDER);
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sscreen->assume_no_z_fights =
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driQueryOptionb(config->options, "radeonsi_assume_no_z_fights");
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sscreen->commutative_blend_add =
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driQueryOptionb(config->options, "radeonsi_commutative_blend_add");
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sscreen->has_msaa_sample_loc_bug = (sscreen->b.family >= CHIP_POLARIS10 &&
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sscreen->b.family <= CHIP_POLARIS12) ||
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sscreen->b.family == CHIP_VEGA10 ||
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@@ -96,6 +96,7 @@ struct si_screen {
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bool has_draw_indirect_multi;
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bool has_out_of_order_rast;
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bool assume_no_z_fights;
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bool commutative_blend_add;
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bool has_msaa_sample_loc_bug;
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bool dpbb_allowed;
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bool dfsm_allowed;
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@@ -377,6 +377,48 @@ static uint32_t si_translate_blend_opt_factor(int blend_fact, bool is_alpha)
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}
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}
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static void si_blend_check_commutativity(struct si_screen *sscreen,
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struct si_state_blend *blend,
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enum pipe_blend_func func,
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enum pipe_blendfactor src,
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enum pipe_blendfactor dst,
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unsigned chanmask)
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{
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/* Src factor is allowed when it does not depend on Dst */
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static const uint32_t src_allowed =
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(1u << PIPE_BLENDFACTOR_ONE) |
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(1u << PIPE_BLENDFACTOR_SRC_COLOR) |
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(1u << PIPE_BLENDFACTOR_SRC_ALPHA) |
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(1u << PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE) |
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(1u << PIPE_BLENDFACTOR_CONST_COLOR) |
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(1u << PIPE_BLENDFACTOR_CONST_ALPHA) |
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(1u << PIPE_BLENDFACTOR_SRC1_COLOR) |
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(1u << PIPE_BLENDFACTOR_SRC1_ALPHA) |
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(1u << PIPE_BLENDFACTOR_ZERO) |
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(1u << PIPE_BLENDFACTOR_INV_SRC_COLOR) |
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(1u << PIPE_BLENDFACTOR_INV_SRC_ALPHA) |
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(1u << PIPE_BLENDFACTOR_INV_CONST_COLOR) |
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(1u << PIPE_BLENDFACTOR_INV_CONST_ALPHA) |
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(1u << PIPE_BLENDFACTOR_INV_SRC1_COLOR) |
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(1u << PIPE_BLENDFACTOR_INV_SRC1_ALPHA);
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if (dst == PIPE_BLENDFACTOR_ONE &&
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(src_allowed & (1u << src))) {
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/* Addition is commutative, but floating point addition isn't
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* associative: subtle changes can be introduced via different
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* rounding.
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*
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* Out-of-order is also non-deterministic, which means that
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* this breaks OpenGL invariance requirements. So only enable
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* out-of-order additive blending if explicitly allowed by a
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* setting.
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*/
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if (func == PIPE_BLEND_MAX || func == PIPE_BLEND_MIN ||
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(func == PIPE_BLEND_ADD && sscreen->commutative_blend_add))
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blend->commutative_4bit |= chanmask;
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}
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}
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/**
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* Get rid of DST in the blend factors by commuting the operands:
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* func(src * DST, dst * 0) ---> func(src * 0, dst * SRC)
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@@ -493,6 +535,11 @@ static void *si_create_blend_state_mode(struct pipe_context *ctx,
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continue;
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}
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si_blend_check_commutativity(sctx->screen, blend,
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eqRGB, srcRGB, dstRGB, 0x7 << (4 * i));
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si_blend_check_commutativity(sctx->screen, blend,
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eqA, srcA, dstA, 0x8 << (4 * i));
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/* Blending optimizations for RB+.
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* These transformations don't change the behavior.
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*
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@@ -636,6 +683,7 @@ static void si_bind_blend_state(struct pipe_context *ctx, void *state)
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(!old_blend ||
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(old_blend->blend_enable_4bit != blend->blend_enable_4bit ||
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old_blend->cb_target_enabled_4bit != blend->cb_target_enabled_4bit ||
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old_blend->commutative_4bit != blend->commutative_4bit ||
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old_blend->logicop_enable != blend->logicop_enable)))
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si_mark_atom_dirty(sctx, &sctx->msaa_config);
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}
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@@ -3208,12 +3256,23 @@ static bool si_out_of_order_rasterization(struct si_context *sctx)
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if (!colormask)
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return true;
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bool blend_enabled = (colormask & blend->blend_enable_4bit) != 0;
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unsigned blendmask = colormask & blend->blend_enable_4bit;
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if (blend_enabled)
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return false; /* TODO */
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if (blendmask) {
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/* Only commutative blending. */
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if (blendmask & ~blend->commutative_4bit)
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return false;
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return dsa_order_invariant.pass_last;
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if (!dsa_order_invariant.pass_set)
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return false;
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}
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if (colormask & ~blendmask) {
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if (!dsa_order_invariant.pass_last)
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return false;
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}
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return true;
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}
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static void si_emit_msaa_config(struct si_context *sctx, struct r600_atom *atom)
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@@ -55,6 +55,7 @@ struct si_state_blend {
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unsigned cb_target_enabled_4bit;
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unsigned blend_enable_4bit;
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unsigned need_src_alpha_4bit;
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unsigned commutative_4bit;
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bool alpha_to_coverage:1;
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bool alpha_to_one:1;
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bool dual_src_blend:1;
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@@ -443,3 +443,8 @@ DRI_CONF_OPT_END
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DRI_CONF_OPT_BEGIN_B(radeonsi_assume_no_z_fights, def) \
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DRI_CONF_DESC(en,gettext("Assume no Z fights (enables aggressive out-of-order rasterization to improve performance; may cause rendering errors)")) \
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DRI_CONF_OPT_END
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#define DRI_CONF_RADEONSI_COMMUTATIVE_BLEND_ADD(def) \
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DRI_CONF_OPT_BEGIN_B(radeonsi_commutative_blend_add, def) \
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DRI_CONF_DESC(en,gettext("Commutative additive blending optimizations (may cause rendering errors)")) \
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DRI_CONF_OPT_END
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