diff --git a/docs/features.txt b/docs/features.txt
index 2312dac7a24..831a9a6884b 100644
--- a/docs/features.txt
+++ b/docs/features.txt
@@ -303,7 +303,7 @@ Khronos, ARB, and OES extensions that are not part of any OpenGL or OpenGL ES ve
   GL_ARB_fragment_shader_interlock                      DONE (i965)
   GL_ARB_gpu_shader_int64                               DONE (i965/gen8+, nvc0, radeonsi, softpipe, llvmpipe)
   GL_ARB_parallel_shader_compile                        DONE (all drivers)
-  GL_ARB_post_depth_coverage                            DONE (i965, nvc0)
+  GL_ARB_post_depth_coverage                            DONE (i965, nvc0, radeonsi)
   GL_ARB_robustness_isolation                           not started
   GL_ARB_sample_locations                               DONE (nvc0)
   GL_ARB_seamless_cubemap_per_texture                   DONE (etnaviv/SEAMLESS_CUBE_MAP, freedreno, i965, nvc0, radeonsi, r600, softpipe, swr, virgl)
diff --git a/docs/relnotes/19.2.0.html b/docs/relnotes/19.2.0.html
index 971958517a1..20eb8d3d04f 100644
--- a/docs/relnotes/19.2.0.html
+++ b/docs/relnotes/19.2.0.html
@@ -39,6 +39,7 @@ TBD.
 <h2>New features</h2>
 
 <ul>
+<li>GL_ARB_post_depth_coverage on radeonsi (Navi)</li>
 <li>EGL_EXT_platform_device</li>
 <li>VK_EXT_queue_family_foreign for radv</li>
 <li>VK_EXT_shader_demote_to_helper_invocation on Intel.</li>
diff --git a/src/gallium/drivers/radeonsi/si_get.c b/src/gallium/drivers/radeonsi/si_get.c
index f2182a91076..b784d4ad0e9 100644
--- a/src/gallium/drivers/radeonsi/si_get.c
+++ b/src/gallium/drivers/radeonsi/si_get.c
@@ -163,6 +163,9 @@ static int si_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
 	case PIPE_CAP_QUERY_SO_OVERFLOW:
 		return sscreen->info.chip_class <= GFX9;
 
+	case PIPE_CAP_POST_DEPTH_COVERAGE:
+		return sscreen->info.chip_class >= GFX10;
+
 	case PIPE_CAP_RESOURCE_FROM_USER_MEMORY:
 		return !SI_BIG_ENDIAN && sscreen->info.has_userptr;
 
@@ -224,7 +227,6 @@ static int si_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
 	case PIPE_CAP_TGSI_MUL_ZERO_WINS:
 	case PIPE_CAP_UMA:
 	case PIPE_CAP_POLYGON_MODE_FILL_RECTANGLE:
-	case PIPE_CAP_POST_DEPTH_COVERAGE:
 	case PIPE_CAP_TILE_RASTER_ORDER:
 	case PIPE_CAP_MAX_COMBINED_SHADER_OUTPUT_RESOURCES:
 	case PIPE_CAP_CONTEXT_PRIORITY_MASK:
diff --git a/src/gallium/drivers/radeonsi/si_state_shaders.c b/src/gallium/drivers/radeonsi/si_state_shaders.c
index 14a3c3e0363..3f6e4828923 100644
--- a/src/gallium/drivers/radeonsi/si_state_shaders.c
+++ b/src/gallium/drivers/radeonsi/si_state_shaders.c
@@ -2880,6 +2880,9 @@ static void *si_create_shader_selector(struct pipe_context *ctx,
 		sel->db_shader_control |= S_02880C_Z_ORDER(V_02880C_EARLY_Z_THEN_LATE_Z);
 	}
 
+	if (sel->info.properties[TGSI_PROPERTY_FS_POST_DEPTH_COVERAGE])
+		sel->db_shader_control |= S_02880C_PRE_SHADER_DEPTH_COVERAGE_ENABLE(1);
+
 	(void) mtx_init(&sel->mutex, mtx_plain);
 
 	si_schedule_initial_compile(sctx, sel->info.processor, &sel->ready,