aubinator: add a custom handler for immediate register load
Transforming this : 0x00c77084: 0x11000001: MI_LOAD_REGISTER_IMM 0x00c77088: 0x0000b020 : Dword 1 Register Offset: 0x0000b020 0x00c7708c: 0x00880038 : Dword 2 Data DWord: 8912952 Into this: 0x007880f0: 0x11000001: MI_LOAD_REGISTER_IMM 0x007880f4: 0x0000b020 : Dword 1 Register Offset: 0x0000b020 0x007880f8: 0x00080040 : Dword 2 Data DWord: 524352 register L3CNTLREG2 (0xb020) : 0x80040 SLM Enable: 0 URB Allocation: 32 URB Low Bandwidth: 0 RO Allocation: 32 RO Low Bandwidth: 0 DC Allocation: 0 DC Low Bandwidth: 0 v2: Drop unused arguments (Sirisha) Print out register name Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
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@@ -616,6 +616,18 @@ handle_3dstate_scissor_state_pointers(struct gen_spec *spec, uint32_t *p)
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decode_structure(spec, scissor_rect, gtt + start);
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}
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static void
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handle_load_register_imm(struct gen_spec *spec, uint32_t *p)
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{
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struct gen_group *reg = gen_spec_find_register(spec, p[1]);
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if (reg != NULL) {
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printf("register %s (0x%x): 0x%x\n",
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reg->name, reg->register_offset, p[2]);
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decode_structure(spec, reg, &p[2]);
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}
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}
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#define ARRAY_LENGTH(a) (sizeof (a) / sizeof (a)[0])
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#define STATE_BASE_ADDRESS 0x61010000
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@@ -654,6 +666,8 @@ handle_3dstate_scissor_state_pointers(struct gen_spec *spec, uint32_t *p)
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#define _3DSTATE_CC_STATE_POINTERS 0x780e0000
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#define _3DSTATE_SCISSOR_STATE_POINTERS 0x780f0000
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#define _MI_LOAD_REGISTER_IMM 0x11000000
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struct custom_handler {
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uint32_t opcode;
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void (*handle)(struct gen_spec *spec, uint32_t *p);
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@@ -687,7 +701,8 @@ struct custom_handler {
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{ _3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP, handle_3dstate_viewport_state_pointers_sf_clip },
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{ _3DSTATE_BLEND_STATE_POINTERS, handle_3dstate_blend_state_pointers },
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{ _3DSTATE_CC_STATE_POINTERS, handle_3dstate_cc_state_pointers },
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{ _3DSTATE_SCISSOR_STATE_POINTERS, handle_3dstate_scissor_state_pointers }
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{ _3DSTATE_SCISSOR_STATE_POINTERS, handle_3dstate_scissor_state_pointers },
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{ _MI_LOAD_REGISTER_IMM, handle_load_register_imm }
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};
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static void
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