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anv: Record shader compile stats in the pipeline cache

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We're going to want these to be available regardless of caching.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
This commit is contained in:
Jason Ekstrand
2019-04-24 02:00:25 -05:00
parent 2af380d20f
commit 78f3dfb4a2
4 changed files with 59 additions and 9 deletions
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2
src/intel/vulkan/anv_blorp.c
View File

@@ -74,7 +74,7 @@ upload_blorp_shader(struct blorp_batch *batch,
key, key_size, kernel, kernel_size,
NULL, 0,
prog_data, prog_data_size,
NULL, &bind_map);
NULL, 0, NULL, &bind_map);
if (!bin)
return false;

31
src/intel/vulkan/anv_pipeline.c
View File

@@ -524,6 +524,9 @@ struct anv_pipeline_stage {
union brw_any_prog_data prog_data;
uint32_t num_stats;
struct brw_compile_stats stats[3];
VkPipelineCreationFeedbackEXT feedback;
const unsigned *code;
@@ -749,10 +752,12 @@ anv_pipeline_compile_vs(const struct brw_compiler *compiler,
vs_stage->nir->info.outputs_written,
vs_stage->nir->info.separate_shader);
vs_stage->num_stats = 1;
vs_stage->code = brw_compile_vs(compiler, device, mem_ctx,
&vs_stage->key.vs,
&vs_stage->prog_data.vs,
vs_stage->nir, -1, NULL, NULL);
vs_stage->nir, -1,
vs_stage->stats, NULL);
}
static void
@@ -834,10 +839,12 @@ anv_pipeline_compile_tcs(const struct brw_compiler *compiler,
tcs_stage->key.tcs.patch_outputs_written =
tcs_stage->nir->info.patch_outputs_written;
tcs_stage->num_stats = 1;
tcs_stage->code = brw_compile_tcs(compiler, device, mem_ctx,
&tcs_stage->key.tcs,
&tcs_stage->prog_data.tcs,
tcs_stage->nir, -1, NULL, NULL);
tcs_stage->nir, -1,
tcs_stage->stats, NULL);
}
static void
@@ -861,11 +868,13 @@ anv_pipeline_compile_tes(const struct brw_compiler *compiler,
tes_stage->key.tes.patch_inputs_read =
tcs_stage->nir->info.patch_outputs_written;
tes_stage->num_stats = 1;
tes_stage->code = brw_compile_tes(compiler, device, mem_ctx,
&tes_stage->key.tes,
&tcs_stage->prog_data.tcs.base.vue_map,
&tes_stage->prog_data.tes,
tes_stage->nir, NULL, -1, NULL, NULL);
tes_stage->nir, NULL, -1,
tes_stage->stats, NULL);
}
static void
@@ -889,10 +898,12 @@ anv_pipeline_compile_gs(const struct brw_compiler *compiler,
gs_stage->nir->info.outputs_written,
gs_stage->nir->info.separate_shader);
gs_stage->num_stats = 1;
gs_stage->code = brw_compile_gs(compiler, device, mem_ctx,
&gs_stage->key.gs,
&gs_stage->prog_data.gs,
gs_stage->nir, NULL, -1, NULL, NULL);
gs_stage->nir, NULL, -1,
gs_stage->stats, NULL);
}
static void
@@ -1028,7 +1039,12 @@ anv_pipeline_compile_fs(const struct brw_compiler *compiler,
&fs_stage->key.wm,
&fs_stage->prog_data.wm,
fs_stage->nir, NULL, -1, -1, -1,
true, false, NULL, NULL, NULL);
true, false, NULL,
fs_stage->stats, NULL);
fs_stage->num_stats = (uint32_t)fs_stage->prog_data.wm.dispatch_8 +
(uint32_t)fs_stage->prog_data.wm.dispatch_16 +
(uint32_t)fs_stage->prog_data.wm.dispatch_32;
if (fs_stage->key.wm.nr_color_regions == 0 &&
!fs_stage->prog_data.wm.has_side_effects &&
@@ -1298,6 +1314,7 @@ anv_pipeline_compile_graphics(struct anv_pipeline *pipeline,
stages[s].nir->constant_data_size,
&stages[s].prog_data.base,
brw_prog_data_size(s),
stages[s].stats, stages[s].num_stats,
xfb_info, &stages[s].bind_map);
if (!bin) {
ralloc_free(stage_ctx);
@@ -1449,9 +1466,10 @@ anv_pipeline_compile_cs(struct anv_pipeline *pipeline,
NIR_PASS_V(stage.nir, nir_lower_explicit_io,
nir_var_mem_shared, nir_address_format_32bit_offset);
stage.num_stats = 1;
stage.code = brw_compile_cs(compiler, pipeline->device, mem_ctx,
&stage.key.cs, &stage.prog_data.cs,
stage.nir, -1, NULL, NULL);
stage.nir, -1, stage.stats, NULL);
if (stage.code == NULL) {
ralloc_free(mem_ctx);
return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
@@ -1465,6 +1483,7 @@ anv_pipeline_compile_cs(struct anv_pipeline *pipeline,
stage.nir->constant_data_size,
&stage.prog_data.base,
sizeof(stage.prog_data.cs),
stage.stats, stage.num_stats,
NULL, &stage.bind_map);
if (!bin) {
ralloc_free(mem_ctx);

27
src/intel/vulkan/anv_pipeline_cache.c
View File

@@ -37,6 +37,7 @@ anv_shader_bin_create(struct anv_device *device,
const void *constant_data, uint32_t constant_data_size,
const struct brw_stage_prog_data *prog_data_in,
uint32_t prog_data_size, const void *prog_data_param_in,
const struct brw_compile_stats *stats, uint32_t num_stats,
const nir_xfb_info *xfb_info_in,
const struct anv_pipeline_bind_map *bind_map)
{
@@ -93,6 +94,10 @@ anv_shader_bin_create(struct anv_device *device,
shader->prog_data = prog_data;
shader->prog_data_size = prog_data_size;
assert(num_stats <= ARRAY_SIZE(shader->stats));
typed_memcpy(shader->stats, stats, num_stats);
shader->num_stats = num_stats;
if (xfb_info_in) {
*xfb_info = *xfb_info_in;
typed_memcpy(xfb_info->outputs, xfb_info_in->outputs,
@@ -143,6 +148,10 @@ anv_shader_bin_write_to_blob(const struct anv_shader_bin *shader,
shader->prog_data->nr_params *
sizeof(*shader->prog_data->param));
blob_write_uint32(blob, shader->num_stats);
blob_write_bytes(blob, shader->stats,
shader->num_stats * sizeof(shader->stats[0]));
if (shader->xfb_info) {
uint32_t xfb_info_size =
nir_xfb_info_size(shader->xfb_info->output_count);
@@ -185,6 +194,10 @@ anv_shader_bin_create_from_blob(struct anv_device *device,
const void *prog_data_param =
blob_read_bytes(blob, prog_data->nr_params * sizeof(*prog_data->param));
uint32_t num_stats = blob_read_uint32(blob);
const struct brw_compile_stats *stats =
blob_read_bytes(blob, num_stats * sizeof(stats[0]));
const nir_xfb_info *xfb_info = NULL;
uint32_t xfb_size = blob_read_uint32(blob);
if (xfb_size)
@@ -208,7 +221,7 @@ anv_shader_bin_create_from_blob(struct anv_device *device,
kernel_data, kernel_size,
constant_data, constant_data_size,
prog_data, prog_data_size, prog_data_param,
xfb_info, &bind_map);
stats, num_stats, xfb_info, &bind_map);
}
/* Remaining work:
@@ -359,6 +372,8 @@ anv_pipeline_cache_add_shader_locked(struct anv_pipeline_cache *cache,
const struct brw_stage_prog_data *prog_data,
uint32_t prog_data_size,
const void *prog_data_param,
const struct brw_compile_stats *stats,
uint32_t num_stats,
const nir_xfb_info *xfb_info,
const struct anv_pipeline_bind_map *bind_map)
{
@@ -372,7 +387,7 @@ anv_pipeline_cache_add_shader_locked(struct anv_pipeline_cache *cache,
kernel_data, kernel_size,
constant_data, constant_data_size,
prog_data, prog_data_size, prog_data_param,
xfb_info, bind_map);
stats, num_stats, xfb_info, bind_map);
if (!bin)
return NULL;
@@ -389,6 +404,8 @@ anv_pipeline_cache_upload_kernel(struct anv_pipeline_cache *cache,
uint32_t constant_data_size,
const struct brw_stage_prog_data *prog_data,
uint32_t prog_data_size,
const struct brw_compile_stats *stats,
uint32_t num_stats,
const nir_xfb_info *xfb_info,
const struct anv_pipeline_bind_map *bind_map)
{
@@ -401,6 +418,7 @@ anv_pipeline_cache_upload_kernel(struct anv_pipeline_cache *cache,
constant_data, constant_data_size,
prog_data, prog_data_size,
prog_data->param,
stats, num_stats,
xfb_info, bind_map);
pthread_mutex_unlock(&cache->mutex);
@@ -417,6 +435,7 @@ anv_pipeline_cache_upload_kernel(struct anv_pipeline_cache *cache,
constant_data, constant_data_size,
prog_data, prog_data_size,
prog_data->param,
stats, num_stats,
xfb_info, bind_map);
}
}
@@ -659,6 +678,8 @@ anv_device_upload_kernel(struct anv_device *device,
uint32_t constant_data_size,
const struct brw_stage_prog_data *prog_data,
uint32_t prog_data_size,
const struct brw_compile_stats *stats,
uint32_t num_stats,
const nir_xfb_info *xfb_info,
const struct anv_pipeline_bind_map *bind_map)
{
@@ -668,6 +689,7 @@ anv_device_upload_kernel(struct anv_device *device,
kernel_data, kernel_size,
constant_data, constant_data_size,
prog_data, prog_data_size,
stats, num_stats,
xfb_info, bind_map);
} else {
bin = anv_shader_bin_create(device, key_data, key_size,
@@ -675,6 +697,7 @@ anv_device_upload_kernel(struct anv_device *device,
constant_data, constant_data_size,
prog_data, prog_data_size,
prog_data->param,
stats, num_stats,
xfb_info, bind_map);
}

8
src/intel/vulkan/anv_private.h
View File

@@ -1054,6 +1054,8 @@ anv_pipeline_cache_upload_kernel(struct anv_pipeline_cache *cache,
uint32_t constant_data_size,
const struct brw_stage_prog_data *prog_data,
uint32_t prog_data_size,
const struct brw_compile_stats *stats,
uint32_t num_stats,
const struct nir_xfb_info *xfb_info,
const struct anv_pipeline_bind_map *bind_map);
@@ -1072,6 +1074,8 @@ anv_device_upload_kernel(struct anv_device *device,
uint32_t constant_data_size,
const struct brw_stage_prog_data *prog_data,
uint32_t prog_data_size,
const struct brw_compile_stats *stats,
uint32_t num_stats,
const struct nir_xfb_info *xfb_info,
const struct anv_pipeline_bind_map *bind_map);
@@ -2753,6 +2757,9 @@ struct anv_shader_bin {
const struct brw_stage_prog_data *prog_data;
uint32_t prog_data_size;
struct brw_compile_stats stats[3];
uint32_t num_stats;
struct nir_xfb_info *xfb_info;
struct anv_pipeline_bind_map bind_map;
@@ -2765,6 +2772,7 @@ anv_shader_bin_create(struct anv_device *device,
const void *constant_data, uint32_t constant_data_size,
const struct brw_stage_prog_data *prog_data,
uint32_t prog_data_size, const void *prog_data_param,
const struct brw_compile_stats *stats, uint32_t num_stats,
const struct nir_xfb_info *xfb_info,
const struct anv_pipeline_bind_map *bind_map);