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intel/common/intel_genX_state.h: Add intel_set_ps_dispatch_state()

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This replaces brw_fs_get_dispatch_enables(), which was added in
b9403b1c47 ("intel: factor out dispatch PS enabling logic"), but this
function will not work well for future changes to 3DSTATE_PS.

So, instead, this moves the related code into a "genX" file which can
directly update 3DSTATE_PS for the given platform.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20329>
This commit is contained in:
Jordan Justen
2022-12-08 16:31:20 -08:00
parent f16e76d940
commit 78a75e0d25
7 changed files with 86 additions and 84 deletions
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59
src/intel/compiler/brw_compiler.h
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@@ -957,65 +957,6 @@ brw_fs_simd_width_for_ksp(unsigned ksp_idx, bool simd8_enabled,
}
}
static inline void
brw_fs_get_dispatch_enables(const struct intel_device_info *devinfo,
const struct brw_wm_prog_data *prog_data,
unsigned rasterization_samples,
bool *enable_8,
bool *enable_16,
bool *enable_32)
{
assert(rasterization_samples != 0);
*enable_8 = prog_data->dispatch_8;
*enable_16 = prog_data->dispatch_16;
*enable_32 = prog_data->dispatch_32;
if (prog_data->persample_dispatch) {
/* TGL PRMs, Volume 2d: Command Reference: Structures:
* 3DSTATE_PS_BODY::32 Pixel Dispatch Enable:
*
* "Must not be enabled when dispatch rate is sample AND NUM_MULTISAMPLES > 1."
*/
if (devinfo->ver >= 12 && rasterization_samples > 1)
*enable_32 = false;
/* Starting with SandyBridge (where we first get MSAA), the different
* pixel dispatch combinations are grouped into classifications A
* through F (SNB PRM Vol. 2 Part 1 Section 7.7.1). On most hardware
* generations, the only configurations supporting persample dispatch
* are those in which only one dispatch width is enabled.
*
* The Gfx12 hardware spec has a similar dispatch grouping table, but
* the following conflicting restriction applies (from the page on
* "Structure_3DSTATE_PS_BODY"), so we need to keep the SIMD16 shader:
*
* "SIMD32 may only be enabled if SIMD16 or (dual)SIMD8 is also
* enabled."
*/
if (*enable_32 || *enable_16)
*enable_8 = false;
if (devinfo->ver < 12 && *enable_32)
*enable_16 = false;
}
/* The docs for 3DSTATE_PS::32 Pixel Dispatch Enable say:
*
* "When NUM_MULTISAMPLES = 16 or FORCE_SAMPLE_COUNT = 16,
* SIMD32 Dispatch must not be enabled for PER_PIXEL dispatch
* mode."
*
* 16x MSAA only exists on Gfx9+, so we can skip this on Gfx8.
*/
if (devinfo->ver >= 9 && rasterization_samples == 16 &&
!prog_data->persample_dispatch) {
assert(*enable_8 || *enable_16);
*enable_32 = false;
}
assert(*enable_8 || *enable_16 || *enable_32);
}
#define brw_wm_state_simd_width_for_ksp(wm_state, ksp_idx) \
brw_fs_simd_width_for_ksp((ksp_idx), (wm_state)._8PixelDispatchEnable, \
(wm_state)._16PixelDispatchEnable, \