intel: Drop some author comments and update Faith's name
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22120>
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@@ -63,7 +63,7 @@ format, each 2x2 subspan coming out of a shader will land entirely within one
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cache-line pair.
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What is the correspondence between bits and cache-line pairs? The best model I
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(Jason) know of is to consider the CCS as having a 1-bit color format for
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(Faith) know of is to consider the CCS as having a 1-bit color format for
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fast-clears and a 2-bit format for color compression and a special tiling
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format. The CCS tiling formats operate on a 1 or 2-bit granularity rather than
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the byte granularity of most tiling formats.
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@@ -3,7 +3,7 @@ Intel Surface Layout (ISL)
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The Intel Surface Layout library (**ISL**) is a subproject in Mesa for doing
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surface layout calculations for Intel graphics drivers. It was originally
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written by Chad Versace and is now maintained by Jason Ekstrand and Nanley
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written by Lina Versace and is now maintained by Faith Ekstrand and Nanley
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Chery.
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.. toctree::
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