aco: swap the correct v_mov_b32 if there are two of them
Previously, this function tried to swap the instruction which is not v_mov_b32, so that it doesn't introduce any new OPY-only instructions. If both were v_mov_b32, it swapped Y. Since this makes Y opy-only, this can't be done if X is also opy-only. Signed-off-by: Rhys Perry <pendingchaos02@gmail.com> Fixes: 408fa33c0928 ("aco/gfx12: don't use second VALU for VOPD's OPX if there is a WaR") Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/13101 Reviewed-by: Georg Lehmann <dadschoorse@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34841> (cherry picked from commit 9ca71b52aa5bc2eda1f08149f7780e59858ee27b)
This commit is contained in:

committed by
Eric Engestrom

parent
9c49a2e03f
commit
77e7fd0dee
@@ -104,7 +104,7 @@
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"description": "aco: swap the correct v_mov_b32 if there are two of them",
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"description": "aco: swap the correct v_mov_b32 if there are two of them",
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"nominated": true,
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"nominated": true,
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"nomination_type": 2,
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"nomination_type": 2,
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"resolution": 0,
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"resolution": 1,
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"main_sha": null,
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"main_sha": null,
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"because_sha": "408fa33c092810155baac342de90fd712231aa89",
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"because_sha": "408fa33c092810155baac342de90fd712231aa89",
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"notes": null
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"notes": null
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@@ -758,13 +758,17 @@ create_vopd_instruction(const SchedILPContext& ctx, unsigned idx, bool prev_can_
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if (x_info.src_banks & y_info.src_banks) {
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if (x_info.src_banks & y_info.src_banks) {
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assert(x_info.is_commutative || y_info.is_commutative);
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assert(x_info.is_commutative || y_info.is_commutative);
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/* Avoid swapping v_mov_b32 because it will become an OPY-only opcode. */
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/* Avoid swapping v_mov_b32 because it will become an OPY-only opcode. */
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if (x_info.op == aco_opcode::v_dual_mov_b32 && !y_info.is_commutative) {
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if (x_info.op == aco_opcode::v_dual_mov_b32 && y_info.op == aco_opcode::v_dual_mov_b32) {
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swap_x = x_info.is_opy_only;
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swap_y = !swap_x;
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} else if (x_info.op == aco_opcode::v_dual_mov_b32 && !y_info.is_commutative) {
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swap_x = true;
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swap_x = true;
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x_info.is_opy_only = true;
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x_info.is_opy_only = true;
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} else {
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} else {
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swap_x = x_info.is_commutative && x_info.op != aco_opcode::v_dual_mov_b32;
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swap_x = x_info.is_commutative && x_info.op != aco_opcode::v_dual_mov_b32;
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swap_y = y_info.is_commutative && !swap_x;
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swap_y = y_info.is_commutative && !swap_x;
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}
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}
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y_info.is_opy_only |= swap_y && y_info.op == aco_opcode::v_dual_mov_b32;
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}
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}
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if (x_info.is_opy_only) {
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if (x_info.is_opy_only) {
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@@ -162,6 +162,7 @@ BEGIN_TEST(vopd_sched.war)
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PhysReg reg_v0{256};
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PhysReg reg_v0{256};
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PhysReg reg_v1{257};
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PhysReg reg_v1{257};
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PhysReg reg_v3{259};
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PhysReg reg_v3{259};
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PhysReg reg_v5{261};
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//>> p_unit_test 0
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//>> p_unit_test 0
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//~gfx11! v1: %0:v[1] = v_dual_add_f32 %0:v[3], %0:v[1] :: v1: %0:v[0] = v_dual_mul_f32 %0:v[1], %0:v[3]
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//~gfx11! v1: %0:v[1] = v_dual_add_f32 %0:v[3], %0:v[1] :: v1: %0:v[0] = v_dual_mul_f32 %0:v[1], %0:v[3]
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@@ -184,6 +185,14 @@ BEGIN_TEST(vopd_sched.war)
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bld.vop2(aco_opcode::v_mul_f32, Definition(reg_v1, v1), Operand(reg_v3, v1),
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bld.vop2(aco_opcode::v_mul_f32, Definition(reg_v1, v1), Operand(reg_v3, v1),
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Operand(reg_v1, v1));
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Operand(reg_v1, v1));
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/* Test that we swap the right v_mov_b32. */
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//>> p_unit_test 2
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//~gfx11! v1: %0:v[1] = v_dual_mov_b32 %0:v[5] :: v1: %0:v[0] = v_dual_add_nc_u32 0, %0:v[1]
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//~gfx12! v1: %0:v[0] = v_dual_mov_b32 %0:v[1] :: v1: %0:v[1] = v_dual_add_nc_u32 0, %0:v[5]
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bld.pseudo(aco_opcode::p_unit_test, Operand::c32(2));
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bld.vop1(aco_opcode::v_mov_b32, Definition(reg_v0, v1), Operand(reg_v1, v1));
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bld.vop1(aco_opcode::v_mov_b32, Definition(reg_v1, v1), Operand(reg_v5, v1));
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finish_schedule_vopd_test();
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finish_schedule_vopd_test();
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}
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}
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END_TEST
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END_TEST
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