anv/gen12: Write GFX_AUX_TABLE base address register

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
This commit is contained in:
Jordan Justen
2018-03-28 01:50:17 -07:00
parent 109c96b322
commit 7737f56544
4 changed files with 44 additions and 0 deletions

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@@ -54,6 +54,8 @@ void genX(flush_pipeline_select_gpgpu)(struct anv_cmd_buffer *cmd_buffer);
void genX(cmd_buffer_config_l3)(struct anv_cmd_buffer *cmd_buffer,
const struct gen_l3_config *cfg);
void genX(cmd_buffer_aux_map_state)(struct anv_cmd_buffer *cmd_buffer);
void genX(cmd_buffer_flush_state)(struct anv_cmd_buffer *cmd_buffer);
void genX(cmd_buffer_flush_dynamic_state)(struct anv_cmd_buffer *cmd_buffer);

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@@ -2414,6 +2414,7 @@ struct anv_cmd_state {
/* PIPELINE_SELECT.PipelineSelection */
uint32_t current_pipeline;
const struct gen_l3_config * current_l3_config;
uint32_t last_aux_map_state;
struct anv_cmd_graphics_state gfx;
struct anv_cmd_compute_state compute;

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@@ -255,6 +255,10 @@ genX(blorp_exec)(struct blorp_batch *batch,
genX(flush_pipeline_select_3d)(cmd_buffer);
#if GEN_GEN >= 12
genX(cmd_buffer_aux_map_state)(cmd_buffer);
#endif
genX(cmd_buffer_emit_gen7_depth_flush)(cmd_buffer);
/* BLORP doesn't do anything fancy with depth such as discards, so we want

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@@ -29,6 +29,7 @@
#include "vk_util.h"
#include "util/fast_idiv_by_const.h"
#include "common/gen_aux_map.h"
#include "common/gen_l3_config.h"
#include "genxml/gen_macros.h"
#include "genxml/genX_pack.h"
@@ -2660,6 +2661,34 @@ cmd_buffer_flush_push_constants(struct anv_cmd_buffer *cmd_buffer,
cmd_buffer->state.push_constants_dirty &= ~flushed;
}
#if GEN_GEN >= 12
void
genX(cmd_buffer_aux_map_state)(struct anv_cmd_buffer *cmd_buffer)
{
void *aux_map_ctx = cmd_buffer->device->aux_map_ctx;
if (!aux_map_ctx)
return;
uint32_t aux_map_state_num = gen_aux_map_get_state_num(aux_map_ctx);
if (cmd_buffer->state.last_aux_map_state != aux_map_state_num) {
/* If the aux-map state number increased, then we need to rewrite the
* register. Rewriting the register is used to both set the aux-map
* translation table address, and also to invalidate any previously
* cached translations.
*/
uint64_t base_addr = gen_aux_map_get_base(aux_map_ctx);
anv_batch_emit(&cmd_buffer->batch, GENX(MI_LOAD_REGISTER_IMM), lri) {
lri.RegisterOffset = GENX(GFX_AUX_TABLE_BASE_ADDR_num);
lri.DataDWord = base_addr & 0xffffffff;
}
anv_batch_emit(&cmd_buffer->batch, GENX(MI_LOAD_REGISTER_IMM), lri) {
lri.RegisterOffset = GENX(GFX_AUX_TABLE_BASE_ADDR_num) + 4;
lri.DataDWord = base_addr >> 32;
}
cmd_buffer->state.last_aux_map_state = aux_map_state_num;
}
}
#endif
void
genX(cmd_buffer_flush_state)(struct anv_cmd_buffer *cmd_buffer)
{
@@ -2678,6 +2707,10 @@ genX(cmd_buffer_flush_state)(struct anv_cmd_buffer *cmd_buffer)
genX(flush_pipeline_select_3d)(cmd_buffer);
#if GEN_GEN >= 12
genX(cmd_buffer_aux_map_state)(cmd_buffer);
#endif
if (vb_emit) {
const uint32_t num_buffers = __builtin_popcount(vb_emit);
const uint32_t num_dwords = 1 + num_buffers * 4;
@@ -3544,6 +3577,10 @@ genX(cmd_buffer_flush_compute_state)(struct anv_cmd_buffer *cmd_buffer)
genX(flush_pipeline_select_gpgpu)(cmd_buffer);
#if GEN_GEN >= 12
genX(cmd_buffer_aux_map_state)(cmd_buffer);
#endif
if (cmd_buffer->state.compute.pipeline_dirty) {
/* From the Sky Lake PRM Vol 2a, MEDIA_VFE_STATE:
*