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st: Lower uniforms in st in the !PIPE_CAP_PACKED_UNIFORMS case as well.

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PIPE_CAP_PACKED_UNIFORMS conflates several things: Lowering uniforms i/o
at the st level instead of the backend, packing uniforms with no padding
at all, and lowering to UBOs.

Requiring backends to lower uniforms i/o for !PIPE_CAP_PACKED_UNIFORMS
leads to the driver needing to either link against the type size function
in mesa/st, or duplicating it in the backend.  Given that all backends
want this lower-io as far as I can tell, just move it to mesa/st to
resolve the link issue and avoid the driver author needing to understand
st's uniforms layout.

Incidentally, fixes uniform layout failures in nouveau in:

dEQP-GLES2.functional.shaders.struct.uniform.sampler_nested_fragment
dEQP-GLES2.functional.shaders.struct.uniform.sampler_nested_vertex
dEQP-GLES2.functional.shaders.struct.uniform.sampler_array_fragment
dEQP-GLES2.functional.shaders.struct.uniform.sampler_array_vertex

and I think in Lima as well.

v2: fix indents

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
This commit is contained in:
Eric Anholt
2019-04-08 16:32:01 -07:00
parent 3053d5a4f2
commit 771adffec1
7 changed files with 21 additions and 19 deletions
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7
src/gallium/drivers/vc4/vc4_program.c
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@@ -2487,10 +2487,6 @@ vc4_shader_state_create(struct pipe_context *pctx,
* creation.
*/
s = cso->ir.nir;
NIR_PASS_V(s, nir_lower_io, nir_var_uniform,
uniforms_type_size,
(nir_lower_io_options)0);
} else {
assert(cso->type == PIPE_SHADER_IR_TGSI);
@@ -2503,8 +2499,7 @@ vc4_shader_state_create(struct pipe_context *pctx,
s = tgsi_to_nir(cso->tokens, pctx->screen);
}
NIR_PASS_V(s, nir_lower_io, nir_var_all & ~nir_var_uniform,
type_size,
NIR_PASS_V(s, nir_lower_io, nir_var_all, type_size,
(nir_lower_io_options)0);
NIR_PASS_V(s, nir_lower_regs_to_ssa);