diff --git a/src/freedreno/vulkan/tu_cmd_buffer.cc b/src/freedreno/vulkan/tu_cmd_buffer.cc
index 03f64ecb32a..7dda7891608 100644
--- a/src/freedreno/vulkan/tu_cmd_buffer.cc
+++ b/src/freedreno/vulkan/tu_cmd_buffer.cc
@@ -3106,6 +3106,10 @@ tu_CmdBindPipeline(VkCommandBuffer commandBuffer,
          tu_cs_emit_draw_state(cs, TU_DRAW_STATE_DYNAMIC + i, pipeline->dynamic_state[i]);
    }
 
+   cmd->state.pipeline_draw_states = pipeline->set_state_mask;
+   u_foreach_bit(i, pipeline->set_state_mask)
+      cmd->state.dynamic_state[i] = pipeline->dynamic_state[i];
+
    if (pipeline->active_stages & VK_SHADER_STAGE_TESSELLATION_CONTROL_BIT) {
       cmd->state.rp.has_tess = true;
    }
@@ -4815,9 +4819,7 @@ tu6_draw_common(struct tu_cmd_buffer *cmd,
 
       for (uint32_t i = 0; i < ARRAY_SIZE(cmd->state.dynamic_state); i++) {
          tu_cs_emit_draw_state(cs, TU_DRAW_STATE_DYNAMIC + i,
-                               ((pipeline->set_state_mask & BIT(i)) ?
-                                pipeline->dynamic_state[i] :
-                                cmd->state.dynamic_state[i]));
+                               cmd->state.dynamic_state[i]);
       }
    } else {
       /* emit draw states that were just updated */
diff --git a/src/freedreno/vulkan/tu_cmd_buffer.h b/src/freedreno/vulkan/tu_cmd_buffer.h
index d1efe129750..31fda5e2b96 100644
--- a/src/freedreno/vulkan/tu_cmd_buffer.h
+++ b/src/freedreno/vulkan/tu_cmd_buffer.h
@@ -486,6 +486,7 @@ struct tu_cmd_state
    bool pipeline_feedback_loop_ds;
 
    bool pipeline_blend_lrz;
+   uint32_t pipeline_draw_states;
 
    /* VK_QUERY_PIPELINE_STATISTIC_CLIPPING_INVOCATIONS_BIT and
     * VK_QUERY_TYPE_PRIMITIVES_GENERATED_EXT are allowed to run simultaniously,
diff --git a/src/freedreno/vulkan/tu_pipeline.cc b/src/freedreno/vulkan/tu_pipeline.cc
index af246ae304b..3a85ddce8e0 100644
--- a/src/freedreno/vulkan/tu_pipeline.cc
+++ b/src/freedreno/vulkan/tu_pipeline.cc
@@ -3529,7 +3529,7 @@ tu_emit_draw_state(struct tu_cmd_buffer *cmd)
                    ARRAY_SIZE(tu_##name##_state))
 #define DRAW_STATE_COND(name, id, extra_cond, ...)                            \
    if ((EMIT_STATE(name) || extra_cond) &&                                    \
-       !(cmd->state.pipeline->base.set_state_mask & (1u << id))) {            \
+       !(cmd->state.pipeline_draw_states & (1u << id))) {                     \
       unsigned size = tu6_##name##_size<CHIP>(cmd->device, __VA_ARGS__);      \
       if (size > 0) {                                                         \
          tu_cs_begin_sub_stream(&cmd->sub_cs, size, &cs);                     \
@@ -3543,7 +3543,7 @@ tu_emit_draw_state(struct tu_cmd_buffer *cmd)
    }
 #define DRAW_STATE_FDM(name, id, ...)                                         \
    if ((EMIT_STATE(name) || (cmd->state.dirty & TU_CMD_DIRTY_FDM)) &&         \
-       !(cmd->state.pipeline->base.set_state_mask & (1u << id))) {            \
+       !(cmd->state.pipeline_draw_states & (1u << id))) {                     \
       if (cmd->state.shaders[MESA_SHADER_FRAGMENT]->fs.has_fdm) {             \
          tu_cs_set_writeable(&cmd->sub_cs, true);                             \
          tu6_emit_##name##_fdm(&cs, cmd, __VA_ARGS__);                        \