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radv: remove duplicate debug_flags field

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Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
This commit is contained in:
Timothy Arceri
2017-10-11 11:59:20 +11:00
parent e568d2bd1f
commit 7664aaf331
9 changed files with 14 additions and 17 deletions
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2
src/amd/vulkan/radv_cmd_buffer.c
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@@ -373,7 +373,7 @@ void radv_cmd_buffer_trace_emit(struct radv_cmd_buffer *cmd_buffer)
static void static void
radv_cmd_buffer_after_draw(struct radv_cmd_buffer *cmd_buffer) radv_cmd_buffer_after_draw(struct radv_cmd_buffer *cmd_buffer)
{ {
if (cmd_buffer->device->debug_flags & RADV_DEBUG_SYNC_SHADERS) { if (cmd_buffer->device->instance->debug_flags & RADV_DEBUG_SYNC_SHADERS) {
enum radv_cmd_flush_bits flags; enum radv_cmd_flush_bits flags;
/* Force wait for graphics/compute engines to be idle. */ /* Force wait for graphics/compute engines to be idle. */

2
src/amd/vulkan/radv_debug.c
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@@ -599,7 +599,7 @@ radv_dump_enabled_options(struct radv_device *device, FILE *f)
fprintf(f, "Enabled debug options: "); fprintf(f, "Enabled debug options: ");
mask = device->debug_flags; mask = device->instance->debug_flags;
while (mask) { while (mask) {
int i = u_bit_scan64(&mask); int i = u_bit_scan64(&mask);
fprintf(f, "%s, ", radv_get_debug_option_name(i)); fprintf(f, "%s, ", radv_get_debug_option_name(i));

4
src/amd/vulkan/radv_device.c
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@@ -1154,8 +1154,6 @@ VkResult radv_CreateDevice(
device->instance = physical_device->instance; device->instance = physical_device->instance;
device->physical_device = physical_device; device->physical_device = physical_device;
device->debug_flags = device->instance->debug_flags;
device->ws = physical_device->ws; device->ws = physical_device->ws;
if (pAllocator) if (pAllocator)
device->alloc = *pAllocator; device->alloc = *pAllocator;
@@ -3151,7 +3149,7 @@ radv_initialise_color_surface(struct radv_device *device,
} }
if (iview->image->cmask.size && if (iview->image->cmask.size &&
!(device->debug_flags & RADV_DEBUG_NO_FAST_CLEARS)) !(device->instance->debug_flags & RADV_DEBUG_NO_FAST_CLEARS))
cb->cb_color_info |= S_028C70_FAST_CLEAR(1); cb->cb_color_info |= S_028C70_FAST_CLEAR(1);
if (radv_vi_dcc_enabled(iview->image, iview->base_mip)) if (radv_vi_dcc_enabled(iview->image, iview->base_mip))

4
src/amd/vulkan/radv_image.c
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@@ -155,7 +155,7 @@ radv_init_surface(struct radv_device *device,
(pCreateInfo->tiling == VK_IMAGE_TILING_LINEAR) || (pCreateInfo->tiling == VK_IMAGE_TILING_LINEAR) ||
pCreateInfo->mipLevels > 1 || pCreateInfo->arrayLayers > 1 || pCreateInfo->mipLevels > 1 || pCreateInfo->arrayLayers > 1 ||
device->physical_device->rad_info.chip_class < VI || device->physical_device->rad_info.chip_class < VI ||
create_info->scanout || (device->debug_flags & RADV_DEBUG_NO_DCC)) create_info->scanout || (device->instance->debug_flags & RADV_DEBUG_NO_DCC))
surface->flags |= RADEON_SURF_DISABLE_DCC; surface->flags |= RADEON_SURF_DISABLE_DCC;
if (create_info->scanout) if (create_info->scanout)
surface->flags |= RADEON_SURF_SCANOUT; surface->flags |= RADEON_SURF_SCANOUT;
@@ -913,7 +913,7 @@ radv_image_create(VkDevice _device,
} else { } else {
/* Otherwise, try to enable HTILE for depth surfaces. */ /* Otherwise, try to enable HTILE for depth surfaces. */
if (radv_image_can_enable_htile(image) && if (radv_image_can_enable_htile(image) &&
!(device->debug_flags & RADV_DEBUG_NO_HIZ)) { !(device->instance->debug_flags & RADV_DEBUG_NO_HIZ)) {
radv_image_alloc_htile(image); radv_image_alloc_htile(image);
image->tc_compatible_htile = image->surface.flags & RADEON_SURF_TC_COMPATIBLE_HTILE; image->tc_compatible_htile = image->surface.flags & RADEON_SURF_TC_COMPATIBLE_HTILE;
} else { } else {

4
src/amd/vulkan/radv_meta_clear.c
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@@ -683,7 +683,7 @@ emit_fast_htile_clear(struct radv_cmd_buffer *cmd_buffer,
if (!iview->image->surface.htile_size) if (!iview->image->surface.htile_size)
return false; return false;
if (cmd_buffer->device->debug_flags & RADV_DEBUG_NO_FAST_CLEARS) if (cmd_buffer->device->instance->debug_flags & RADV_DEBUG_NO_FAST_CLEARS)
return false; return false;
if (!radv_layout_is_htile_compressed(iview->image, image_layout, radv_image_queue_family_mask(iview->image, cmd_buffer->queue_family_index, cmd_buffer->queue_family_index))) if (!radv_layout_is_htile_compressed(iview->image, image_layout, radv_image_queue_family_mask(iview->image, cmd_buffer->queue_family_index, cmd_buffer->queue_family_index)))
@@ -958,7 +958,7 @@ emit_fast_color_clear(struct radv_cmd_buffer *cmd_buffer,
if (!iview->image->cmask.size && !iview->image->surface.dcc_size) if (!iview->image->cmask.size && !iview->image->surface.dcc_size)
return false; return false;
if (cmd_buffer->device->debug_flags & RADV_DEBUG_NO_FAST_CLEARS) if (cmd_buffer->device->instance->debug_flags & RADV_DEBUG_NO_FAST_CLEARS)
return false; return false;
if (!radv_layout_can_fast_clear(iview->image, image_layout, radv_image_queue_family_mask(iview->image, cmd_buffer->queue_family_index, cmd_buffer->queue_family_index))) if (!radv_layout_can_fast_clear(iview->image, image_layout, radv_image_queue_family_mask(iview->image, cmd_buffer->queue_family_index, cmd_buffer->queue_family_index)))

4
src/amd/vulkan/radv_pipeline.c
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@@ -2093,7 +2093,7 @@ radv_pipeline_init(struct radv_pipeline *pipeline,
pipeline->graphics.vtx_reuse_depth = 14; pipeline->graphics.vtx_reuse_depth = 14;
} }
if (device->debug_flags & RADV_DEBUG_DUMP_SHADER_STATS) { if (device->instance->debug_flags & RADV_DEBUG_DUMP_SHADER_STATS) {
radv_dump_pipeline_stats(device, pipeline); radv_dump_pipeline_stats(device, pipeline);
} }
@@ -2198,7 +2198,7 @@ static VkResult radv_compute_pipeline_create(
*pPipeline = radv_pipeline_to_handle(pipeline); *pPipeline = radv_pipeline_to_handle(pipeline);
if (device->debug_flags & RADV_DEBUG_DUMP_SHADER_STATS) { if (device->instance->debug_flags & RADV_DEBUG_DUMP_SHADER_STATS) {
radv_dump_pipeline_stats(device, pipeline); radv_dump_pipeline_stats(device, pipeline);
} }
return VK_SUCCESS; return VK_SUCCESS;

2
src/amd/vulkan/radv_pipeline_cache.c
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@@ -60,7 +60,7 @@ radv_pipeline_cache_init(struct radv_pipeline_cache *cache,
/* We don't consider allocation failure fatal, we just start with a 0-sized /* We don't consider allocation failure fatal, we just start with a 0-sized
* cache. */ * cache. */
if (cache->hash_table == NULL || if (cache->hash_table == NULL ||
(device->debug_flags & RADV_DEBUG_NO_CACHE)) (device->instance->debug_flags & RADV_DEBUG_NO_CACHE))
cache->table_size = 0; cache->table_size = 0;
else else
memset(cache->hash_table, 0, byte_size); memset(cache->hash_table, 0, byte_size);

1
src/amd/vulkan/radv_private.h
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@@ -513,7 +513,6 @@ struct radv_device {
struct radv_queue *queues[RADV_MAX_QUEUE_FAMILIES]; struct radv_queue *queues[RADV_MAX_QUEUE_FAMILIES];
int queue_count[RADV_MAX_QUEUE_FAMILIES]; int queue_count[RADV_MAX_QUEUE_FAMILIES];
struct radeon_winsys_cs *empty_cs[RADV_MAX_QUEUE_FAMILIES]; struct radeon_winsys_cs *empty_cs[RADV_MAX_QUEUE_FAMILIES];
uint64_t debug_flags;
bool llvm_supports_spill; bool llvm_supports_spill;
bool has_distributed_tess; bool has_distributed_tess;

8
src/amd/vulkan/radv_shader.c
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@@ -174,7 +174,7 @@ radv_shader_compile_to_nir(struct radv_device *device,
uint32_t *spirv = (uint32_t *) module->data; uint32_t *spirv = (uint32_t *) module->data;
assert(module->size % 4 == 0); assert(module->size % 4 == 0);
if (device->debug_flags & RADV_DEBUG_DUMP_SPIRV) if (device->instance->debug_flags & RADV_DEBUG_DUMP_SPIRV)
radv_print_spirv(spirv, module->size, stderr); radv_print_spirv(spirv, module->size, stderr);
uint32_t num_spec_entries = 0; uint32_t num_spec_entries = 0;
@@ -263,7 +263,7 @@ radv_shader_compile_to_nir(struct radv_device *device,
nir_remove_dead_variables(nir, nir_var_local); nir_remove_dead_variables(nir, nir_var_local);
radv_optimize_nir(nir); radv_optimize_nir(nir);
if (device->debug_flags & RADV_DEBUG_DUMP_SHADERS) if (device->instance->debug_flags & RADV_DEBUG_DUMP_SHADERS)
nir_print_shader(nir, stderr); nir_print_shader(nir, stderr);
return nir; return nir;
@@ -386,7 +386,7 @@ shader_variant_create(struct radv_device *device,
unsigned *code_size_out) unsigned *code_size_out)
{ {
enum radeon_family chip_family = device->physical_device->rad_info.family; enum radeon_family chip_family = device->physical_device->rad_info.family;
bool dump_shaders = device->debug_flags & RADV_DEBUG_DUMP_SHADERS; bool dump_shaders = device->instance->debug_flags & RADV_DEBUG_DUMP_SHADERS;
enum ac_target_machine_options tm_options = 0; enum ac_target_machine_options tm_options = 0;
struct radv_shader_variant *variant; struct radv_shader_variant *variant;
struct ac_shader_binary binary; struct ac_shader_binary binary;
@@ -458,7 +458,7 @@ radv_shader_variant_create(struct radv_device *device,
if (key) if (key)
options.key = *key; options.key = *key;
options.unsafe_math = !!(device->debug_flags & RADV_DEBUG_UNSAFE_MATH); options.unsafe_math = !!(device->instance->debug_flags & RADV_DEBUG_UNSAFE_MATH);
options.supports_spill = device->llvm_supports_spill; options.supports_spill = device->llvm_supports_spill;
return shader_variant_create(device, module, shader, shader->stage, return shader_variant_create(device, module, shader, shader->stage,