broadcom/compiler: add lowering pass to scalarize non 32-bit general load/store

V3D hardware doesn't support vector access for general TMU load/store
operations like the ones we use for UBO and SSBO, so we need to split
these to scalar operations.

It should be noted that we also have a vectorization pass (which runs
later, during optimization), that may reconstruct some of these into
32-bit operations when possible (i.e. when the resulting operation
is 32-bit aligned).

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14648>
This commit is contained in:
Iago Toral Quiroga
2022-01-18 10:59:42 +01:00
committed by Marge Bot
parent 05e7e2245b
commit 765d9feb46
4 changed files with 255 additions and 0 deletions

View File

@@ -1109,6 +1109,7 @@ void v3d_nir_lower_robust_buffer_access(nir_shader *shader, struct v3d_compile *
void v3d_nir_lower_scratch(nir_shader *s);
void v3d_nir_lower_txf_ms(nir_shader *s, struct v3d_compile *c);
void v3d_nir_lower_image_load_store(nir_shader *s);
void v3d_nir_lower_load_store_bitsize(nir_shader *s, struct v3d_compile *c);
void v3d33_vir_vpm_read_setup(struct v3d_compile *c, int num_components);
void v3d33_vir_vpm_write_setup(struct v3d_compile *c);