diff --git a/src/intel/vulkan_hasvk/anv_nir_apply_pipeline_layout.c b/src/intel/vulkan_hasvk/anv_nir_apply_pipeline_layout.c index 44abed44213..67219cfd2ff 100644 --- a/src/intel/vulkan_hasvk/anv_nir_apply_pipeline_layout.c +++ b/src/intel/vulkan_hasvk/anv_nir_apply_pipeline_layout.c @@ -762,33 +762,6 @@ lower_direct_buffer_instr(nir_builder *b, nir_instr *instr, void *_state) case nir_intrinsic_deref_atomic_fcomp_swap: return try_lower_direct_buffer_intrinsic(b, intrin, state); - case nir_intrinsic_get_ssbo_size: { - /* The get_ssbo_size intrinsic always just takes a - * index/reindex intrinsic. - */ - nir_intrinsic_instr *idx_intrin = - find_descriptor_for_index_src(intrin->src[0], state); - if (idx_intrin == NULL || !descriptor_has_bti(idx_intrin, state)) - return false; - - b->cursor = nir_before_instr(&intrin->instr); - - /* We just checked that this is a BTI descriptor */ - const nir_address_format addr_format = - nir_address_format_32bit_index_offset; - - nir_ssa_def *buffer_addr = - build_buffer_addr_for_idx_intrin(b, idx_intrin, addr_format, state); - - b->cursor = nir_before_instr(&intrin->instr); - nir_ssa_def *bti = nir_channel(b, buffer_addr, 0); - - nir_instr_rewrite_src(&intrin->instr, &intrin->src[0], - nir_src_for_ssa(bti)); - _mesa_set_add(state->lowered_instrs, intrin); - return true; - } - case nir_intrinsic_load_vulkan_descriptor: if (nir_intrinsic_desc_type(intrin) == VK_DESCRIPTOR_TYPE_ACCELERATION_STRUCTURE_KHR) diff --git a/src/intel/vulkan_hasvk/anv_pipeline.c b/src/intel/vulkan_hasvk/anv_pipeline.c index f88884faa14..21fe0d2f246 100644 --- a/src/intel/vulkan_hasvk/anv_pipeline.c +++ b/src/intel/vulkan_hasvk/anv_pipeline.c @@ -114,6 +114,7 @@ anv_shader_stage_to_nir(struct anv_device *device, .vk_memory_model_device_scope = true, .workgroup_memory_explicit_layout = true, }, + .use_deref_buffer_array_length = true, .ubo_addr_format = anv_nir_ubo_addr_format(pdevice, device->vk.enabled_features.robustBufferAccess), .ssbo_addr_format =