broadcom/compiler: allow ldunifa with read-only SSBOs
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14830>
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@@ -3003,8 +3003,11 @@ emit_ldunifa(struct v3d_compile *c, struct qreg *result)
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}
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static bool
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ntq_emit_load_ubo_unifa(struct v3d_compile *c, nir_intrinsic_instr *instr)
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ntq_emit_load_unifa(struct v3d_compile *c, nir_intrinsic_instr *instr)
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{
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assert(instr->intrinsic == nir_intrinsic_load_ubo ||
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instr->intrinsic == nir_intrinsic_load_ssbo);
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/* Every ldunifa auto-increments the unifa address by 4 bytes, so our
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* current unifa offset is 4 bytes ahead of the offset of the last load.
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*/
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@@ -3015,6 +3018,11 @@ ntq_emit_load_ubo_unifa(struct v3d_compile *c, nir_intrinsic_instr *instr)
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if (nir_src_is_divergent(instr->src[1]))
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return false;
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/* We can only use unifa with SSBOs if they are read-only */
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bool is_ubo = instr->intrinsic == nir_intrinsic_load_ubo;
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if (!is_ubo && !(nir_intrinsic_access(instr) & ACCESS_NON_WRITEABLE))
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return false;
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/* ldunifa is a 32-bit load instruction so we can only use it with
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* 32-bit aligned addresses. We always produce 32-bit aligned addresses
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* except for types smaller than 32-bit, so in these cases we can only
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@@ -3046,11 +3054,11 @@ ntq_emit_load_ubo_unifa(struct v3d_compile *c, nir_intrinsic_instr *instr)
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* shifted up by 1 (0 is gallium's constant buffer 0).
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*/
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uint32_t index = nir_src_as_uint(instr->src[0]);
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if (c->key->environment == V3D_ENVIRONMENT_OPENGL)
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if (is_ubo && c->key->environment == V3D_ENVIRONMENT_OPENGL)
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index++;
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/* We can only keep track of the last unifa address we used with
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* constant offset loads. If the new load targets the same UBO and
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* constant offset loads. If the new load targets the same buffer and
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* is close enough to the previous load, we can skip the unifa register
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* write by emitting dummy ldunifa instructions to update the unifa
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* address.
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@@ -3060,6 +3068,7 @@ ntq_emit_load_ubo_unifa(struct v3d_compile *c, nir_intrinsic_instr *instr)
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if (dynamic_src) {
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c->current_unifa_block = NULL;
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} else if (c->cur_block == c->current_unifa_block &&
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c->current_unifa_is_ubo == is_ubo &&
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c->current_unifa_index == index &&
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c->current_unifa_offset <= const_offset &&
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c->current_unifa_offset + max_unifa_skip_dist >= const_offset) {
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@@ -3067,18 +3076,25 @@ ntq_emit_load_ubo_unifa(struct v3d_compile *c, nir_intrinsic_instr *instr)
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ldunifa_skips = (const_offset - c->current_unifa_offset) / 4;
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} else {
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c->current_unifa_block = c->cur_block;
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c->current_unifa_is_ubo = is_ubo;
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c->current_unifa_index = index;
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c->current_unifa_offset = const_offset;
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}
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if (!skip_unifa) {
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struct qreg base_offset =
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struct qreg base_offset = is_ubo ?
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vir_uniform(c, QUNIFORM_UBO_ADDR,
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v3d_unit_data_create(index, const_offset));
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v3d_unit_data_create(index, const_offset)) :
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vir_uniform(c, QUNIFORM_SSBO_OFFSET, index);
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struct qreg unifa = vir_reg(QFILE_MAGIC, V3D_QPU_WADDR_UNIFA);
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if (!dynamic_src) {
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vir_MOV_dest(c, unifa, base_offset);
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if (is_ubo) {
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vir_MOV_dest(c, unifa, base_offset);
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} else {
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vir_ADD_dest(c, unifa, base_offset,
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vir_uniform_ui(c, const_offset));
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}
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} else {
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vir_ADD_dest(c, unifa, base_offset,
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ntq_get_src(c, instr->src[1], 0));
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@@ -3185,7 +3201,8 @@ ntq_emit_intrinsic(struct v3d_compile *c, nir_intrinsic_instr *instr)
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break;
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case nir_intrinsic_load_ubo:
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if (!ntq_emit_load_ubo_unifa(c, instr))
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case nir_intrinsic_load_ssbo:
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if (!ntq_emit_load_unifa(c, instr))
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ntq_emit_tmu_general(c, instr, false);
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break;
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@@ -3199,7 +3216,6 @@ ntq_emit_intrinsic(struct v3d_compile *c, nir_intrinsic_instr *instr)
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case nir_intrinsic_ssbo_atomic_xor:
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case nir_intrinsic_ssbo_atomic_exchange:
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case nir_intrinsic_ssbo_atomic_comp_swap:
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case nir_intrinsic_load_ssbo:
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case nir_intrinsic_store_ssbo:
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ntq_emit_tmu_general(c, instr, false);
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break;
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@@ -720,6 +720,7 @@ struct v3d_compile {
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struct qblock *current_unifa_block;
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int32_t current_unifa_index;
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uint32_t current_unifa_offset;
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bool current_unifa_is_ubo;
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/* State for whether we're executing on each channel currently. 0 if
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* yes, otherwise a block number + 1 that the channel jumped to.
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