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i965: Add blorp support for gen4-5

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Due to complications with things such as URB setup on gen4-5, it's
easier to keep gen4 support in blorp completely internal to i965.  This
makes things a bit awkward because that means there's a file in i965
that includes blorp_priv.h but it's either that or have a file in blorp
that includes brw_context.h.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
This commit is contained in:
Jason Ekstrand
2016-09-09 16:30:24 -07:00
parent 23125b7102
commit 752d7af77a
10 changed files with 322 additions and 15 deletions
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26
src/intel/blorp/blorp_clear.c
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@@ -366,11 +366,6 @@ blorp_clear(struct blorp_batch *batch,
struct blorp_params params;
blorp_params_init(&params);
params.x0 = x0;
params.y0 = y0;
params.x1 = x1;
params.y1 = y1;
/* Manually apply the clear destination swizzle. This way swizzled clears
* will work for swizzles which we can't normally use for rendering and it
* also ensures that they work on pre-Haswell hardware which can't swizlle
@@ -427,6 +422,27 @@ blorp_clear(struct blorp_batch *batch,
start_layer, format, true);
params.dst.view.swizzle = swizzle;
params.x0 = x0;
params.y0 = y0;
params.x1 = x1;
params.y1 = y1;
/* The MinLOD and MinimumArrayElement don't work properly for cube maps.
* Convert them to a single slice on gen4.
*/
if (batch->blorp->isl_dev->info->gen == 4 &&
(params.dst.surf.usage & ISL_SURF_USAGE_CUBE_BIT)) {
blorp_surf_convert_to_single_slice(batch->blorp->isl_dev, &params.dst);
if (params.dst.tile_x_sa || params.dst.tile_y_sa) {
/* This is gen4 so there is no multisampling and sa == px. */
params.x0 += params.dst.tile_x_sa;
params.y0 += params.dst.tile_y_sa;
params.x1 += params.dst.tile_x_sa;
params.y1 += params.dst.tile_y_sa;
}
}
params.num_samples = params.dst.surf.samples;
/* We may be restricted on the number of layers we can bind at any one