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intel/compiler: Use a struct for brw_compile_tcs parameters

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Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14139>
This commit is contained in:
Caio Oliveira
2021-03-23 14:34:23 -07:00
committed by Marge Bot
parent 76da456954
commit 7372a48a4a
5 changed files with 62 additions and 38 deletions
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15
src/gallium/drivers/crocus/crocus_program.c
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@@ -1461,12 +1461,17 @@ crocus_compile_tcs(struct crocus_context *ice,
struct brw_tcs_prog_key key_clean = *key;
crocus_sanitize_tex_key(&key_clean.base.tex);
char *error_str = NULL;
const unsigned *program =
brw_compile_tcs(compiler, &ice->dbg, mem_ctx, &key_clean, tcs_prog_data, nir,
NULL, &error_str);
struct brw_compile_tcs_params params = {
.nir = nir,
.key = &key_clean,
.prog_data = tcs_prog_data,
.log_data = &ice->dbg,
};
const unsigned *program = brw_compile_tcs(compiler, mem_ctx, &params);
if (program == NULL) {
dbg_printf("Failed to compile control shader: %s\n", error_str);
dbg_printf("Failed to compile control shader: %s\n", params.error_str);
ralloc_free(mem_ctx);
return false;
}

14
src/gallium/drivers/iris/iris_program.c
View File

@@ -1549,12 +1549,16 @@ iris_compile_tcs(struct iris_screen *screen,
prog_data->ubo_ranges[0].length = 1;
}
char *error_str = NULL;
const unsigned *program =
brw_compile_tcs(compiler, dbg, mem_ctx, &brw_key, tcs_prog_data,
nir, NULL, &error_str);
struct brw_compile_tcs_params params = {
.nir = nir,
.key = &brw_key,
.prog_data = tcs_prog_data,
.log_data = dbg,
};
const unsigned *program = brw_compile_tcs(compiler, mem_ctx, &params);
if (program == NULL) {
dbg_printf("Failed to compile control shader: %s\n", error_str);
dbg_printf("Failed to compile control shader: %s\n", params.error_str);
ralloc_free(mem_ctx);
shader->compilation_failed = true;

27
src/intel/compiler/brw_compiler.h
View File

@@ -1566,20 +1566,33 @@ brw_compile_vs(const struct brw_compiler *compiler,
void *mem_ctx,
struct brw_compile_vs_params *params);
/**
* Parameters for compiling a tessellation control shader.
*
* Some of these will be modified during the shader compilation.
*/
struct brw_compile_tcs_params {
nir_shader *nir;
const struct brw_tcs_prog_key *key;
struct brw_tcs_prog_data *prog_data;
struct brw_compile_stats *stats;
void *log_data;
char *error_str;
};
/**
* Compile a tessellation control shader.
*
* Returns the final assembly and the program's size.
* Returns the final assembly and updates the parameters structure.
*/
const unsigned *
brw_compile_tcs(const struct brw_compiler *compiler,
void *log_data,
void *mem_ctx,
const struct brw_tcs_prog_key *key,
struct brw_tcs_prog_data *prog_data,
nir_shader *nir,
struct brw_compile_stats *stats,
char **error_str);
struct brw_compile_tcs_params *params);
/**
* Compile a tessellation evaluation shader.

29
src/intel/compiler/brw_vec4_tcs.cpp
View File

@@ -352,16 +352,15 @@ get_patch_count_threshold(int input_control_points)
extern "C" const unsigned *
brw_compile_tcs(const struct brw_compiler *compiler,
void *log_data,
void *mem_ctx,
const struct brw_tcs_prog_key *key,
struct brw_tcs_prog_data *prog_data,
nir_shader *nir,
struct brw_compile_stats *stats,
char **error_str)
struct brw_compile_tcs_params *params)
{
const struct intel_device_info *devinfo = compiler->devinfo;
nir_shader *nir = params->nir;
const struct brw_tcs_prog_key *key = params->key;
struct brw_tcs_prog_data *prog_data = params->prog_data;
struct brw_vue_prog_data *vue_prog_data = &prog_data->base;
const bool is_scalar = compiler->scalar_stage[MESA_SHADER_TESS_CTRL];
const bool debug_enabled = INTEL_DEBUG(DEBUG_TCS);
const unsigned *assembly;
@@ -453,17 +452,16 @@ brw_compile_tcs(const struct brw_compiler *compiler,
}
if (is_scalar) {
fs_visitor v(compiler, log_data, mem_ctx, &key->base,
fs_visitor v(compiler, params->log_data, mem_ctx, &key->base,
&prog_data->base.base, nir, 8, debug_enabled);
if (!v.run_tcs()) {
if (error_str)
*error_str = ralloc_strdup(mem_ctx, v.fail_msg);
params->error_str = ralloc_strdup(mem_ctx, v.fail_msg);
return NULL;
}
prog_data->base.base.dispatch_grf_start_reg = v.payload.num_regs;
fs_generator g(compiler, log_data, mem_ctx,
fs_generator g(compiler, params->log_data, mem_ctx,
&prog_data->base.base, false, MESA_SHADER_TESS_CTRL);
if (unlikely(debug_enabled)) {
g.enable_debug(ralloc_asprintf(mem_ctx,
@@ -474,17 +472,16 @@ brw_compile_tcs(const struct brw_compiler *compiler,
}
g.generate_code(v.cfg, 8, v.shader_stats,
v.performance_analysis.require(), stats);
v.performance_analysis.require(), params->stats);
g.add_const_data(nir->constant_data, nir->constant_data_size);
assembly = g.get_assembly();
} else {
brw::vec4_tcs_visitor v(compiler, log_data, key, prog_data,
brw::vec4_tcs_visitor v(compiler, params->log_data, key, prog_data,
nir, mem_ctx, debug_enabled);
if (!v.run()) {
if (error_str)
*error_str = ralloc_strdup(mem_ctx, v.fail_msg);
params->error_str = ralloc_strdup(mem_ctx, v.fail_msg);
return NULL;
}
@@ -492,10 +489,10 @@ brw_compile_tcs(const struct brw_compiler *compiler,
v.dump_instructions();
assembly = brw_vec4_generate_assembly(compiler, log_data, mem_ctx, nir,
assembly = brw_vec4_generate_assembly(compiler, params->log_data, mem_ctx, nir,
&prog_data->base, v.cfg,
v.performance_analysis.require(),
stats, debug_enabled);
params->stats, debug_enabled);
}
return assembly;

15
src/intel/vulkan/anv_pipeline.c
View File

@@ -1010,11 +1010,16 @@ anv_pipeline_compile_tcs(const struct brw_compiler *compiler,
tcs_stage->nir->info.patch_outputs_written;
tcs_stage->num_stats = 1;
tcs_stage->code = brw_compile_tcs(compiler, device, mem_ctx,
&tcs_stage->key.tcs,
&tcs_stage->prog_data.tcs,
tcs_stage->nir,
tcs_stage->stats, NULL);
struct brw_compile_tcs_params params = {
.nir = tcs_stage->nir,
.key = &tcs_stage->key.tcs,
.prog_data = &tcs_stage->prog_data.tcs,
.stats = tcs_stage->stats,
.log_data = device,
};
tcs_stage->code = brw_compile_tcs(compiler, mem_ctx, &params);
}
static void