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radv/meta: create clear HTILE mask pipeline on-demand when needed

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Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30244>
This commit is contained in:
Samuel Pitoiset
2024-07-18 14:39:14 +02:00
committed by Marge Bot
parent f8a434bb93
commit 72fa7a0449
1 changed files with 4 additions and 4 deletions
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8
src/amd/vulkan/meta/radv_meta_clear.c
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@@ -1011,10 +1011,6 @@ radv_device_init_meta_clear_state(struct radv_device *device, bool on_demand)
if (res != VK_SUCCESS)
return res;
res = create_clear_htile_mask_pipeline(device);
if (res != VK_SUCCESS)
return res;
res = init_meta_clear_dcc_comp_to_single_state(device);
if (res != VK_SUCCESS)
return res;
@@ -1022,6 +1018,10 @@ radv_device_init_meta_clear_state(struct radv_device *device, bool on_demand)
if (on_demand)
return VK_SUCCESS;
res = create_clear_htile_mask_pipeline(device);
if (res != VK_SUCCESS)
return res;
for (uint32_t i = 0; i < ARRAY_SIZE(state->color_clear); ++i) {
uint32_t samples = 1 << i;