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intel/compiler: Introduce a new brw_isa_info structure

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This structure will contain the opcode mapping tables in the next
commit.  For now, this is the mechanical change to plumb it into all
the necessary places, and it continues simply holding devinfo.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17309>
This commit is contained in:
Kenneth Graunke
2022-06-29 14:13:31 -07:00
committed by Marge Bot
parent 342471e93d
commit 72e9843991
48 changed files with 541 additions and 399 deletions
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8
src/intel/compiler/brw_fs_bank_conflicts.cpp
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@@ -645,7 +645,7 @@ namespace {
} else if (inst->opcode == BRW_OPCODE_WHILE) {
block_scale /= 10;
} else if (inst->is_3src(v->devinfo) &&
} else if (inst->is_3src(v->compiler) &&
is_grf(inst->src[1]) && is_grf(inst->src[2])) {
const unsigned r = p.atom_of_reg(reg_of(inst->src[1]));
const unsigned s = p.atom_of_reg(reg_of(inst->src[2]));
@@ -942,10 +942,10 @@ fs_visitor::opt_bank_conflicts()
* we don't know which bank each VGRF is going to end up aligned to.
*/
bool
has_bank_conflict(const intel_device_info *devinfo, const fs_inst *inst)
has_bank_conflict(const struct brw_isa_info *isa, const fs_inst *inst)
{
return inst->is_3src(devinfo) &&
return is_3src(isa, inst->opcode) &&
is_grf(inst->src[1]) && is_grf(inst->src[2]) &&
bank_of(reg_of(inst->src[1])) == bank_of(reg_of(inst->src[2])) &&
!is_conflict_optimized_out(devinfo, inst);
!is_conflict_optimized_out(isa->devinfo, inst);
}