diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c
index 67f03f7c628..71b3580346f 100644
--- a/src/amd/vulkan/radv_pipeline.c
+++ b/src/amd/vulkan/radv_pipeline.c
@@ -2802,17 +2802,6 @@ radv_fill_shader_info(struct radv_pipeline *pipeline,
 {
    struct radv_device *device = pipeline->device;
 
-   if (stages[MESA_SHADER_TESS_CTRL].nir) {
-      stages[MESA_SHADER_VERTEX].info.vs.as_ls = true;
-   }
-
-   if (stages[MESA_SHADER_GEOMETRY].nir) {
-      if (stages[MESA_SHADER_TESS_CTRL].nir)
-         stages[MESA_SHADER_TESS_EVAL].info.tes.as_es = true;
-      else
-         stages[MESA_SHADER_VERTEX].info.vs.as_es = true;
-   }
-
    for (int i = 0; i < MESA_VULKAN_SHADER_STAGES; i++) {
       if (!stages[i].nir)
          continue;
diff --git a/src/amd/vulkan/radv_shader_info.c b/src/amd/vulkan/radv_shader_info.c
index 768e872572a..d61d4399e6c 100644
--- a/src/amd/vulkan/radv_shader_info.c
+++ b/src/amd/vulkan/radv_shader_info.c
@@ -1268,9 +1268,17 @@ radv_link_shaders_info(struct radv_device *device,
 
    if (producer->stage == MESA_SHADER_VERTEX || producer->stage == MESA_SHADER_TESS_EVAL) {
       if (consumer->stage == MESA_SHADER_GEOMETRY) {
+         uint32_t num_outputs_written;
+
+         if (producer->stage == MESA_SHADER_TESS_EVAL) {
+            num_outputs_written = producer->info.tes.num_linked_outputs;
+            producer->info.tes.as_es = true;
+         } else {
+            num_outputs_written = producer->info.vs.num_linked_outputs;
+            producer->info.vs.as_es = true;
+         }
+
          /* Compute the ESGS item size for VS or TES as ES. */
-         uint32_t num_outputs_written = producer->stage == MESA_SHADER_TESS_EVAL
-            ? producer->info.tes.num_linked_outputs : producer->info.vs.num_linked_outputs;
          producer->info.esgs_itemsize = num_outputs_written * 16;
       }
 
@@ -1294,6 +1302,8 @@ radv_link_shaders_info(struct radv_device *device,
       struct radv_pipeline_stage *vs_stage = producer;
       struct radv_pipeline_stage *tcs_stage = consumer;
 
+      vs_stage->info.vs.as_ls = true;
+
       vs_stage->info.workgroup_size =
          ac_compute_lshs_workgroup_size(device->physical_device->rad_info.gfx_level,
                                         MESA_SHADER_VERTEX, tcs_stage->info.num_tess_patches,