radv: Add the concept of radv shader binaries.
This simplifies a bunch of stuff by (1) Keeping all the things in a single allocation, making things easier for the cache. (2) creating a shader_variant creation helper. This is immediately put to use by creating rtld shader binaries. This is the main reason for the binaries, as we need to do the linking at upload time, i.e. post caching. We do not enable rtld yet. Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
This commit is contained in:
@@ -3863,32 +3863,33 @@ static unsigned ac_llvm_compile(LLVMModuleRef M,
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static void ac_compile_llvm_module(struct ac_llvm_compiler *ac_llvm,
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LLVMModuleRef llvm_module,
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struct ac_shader_binary *binary,
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struct ac_shader_config *config,
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struct radv_shader_binary **rbinary,
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struct radv_shader_variant_info *shader_info,
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gl_shader_stage stage,
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const struct radv_nir_compiler_options *options)
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{
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struct ac_shader_binary binary;
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struct ac_shader_config config;
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if (options->dump_shader)
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ac_dump_module(llvm_module);
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memset(binary, 0, sizeof(*binary));
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memset(&binary, 0, sizeof(binary));
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if (options->record_llvm_ir) {
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char *llvm_ir = LLVMPrintModuleToString(llvm_module);
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binary->llvm_ir_string = strdup(llvm_ir);
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binary.llvm_ir_string = strdup(llvm_ir);
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LLVMDisposeMessage(llvm_ir);
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}
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int v = ac_llvm_compile(llvm_module, binary, ac_llvm);
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int v = ac_llvm_compile(llvm_module, &binary, ac_llvm);
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if (v) {
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fprintf(stderr, "compile failed\n");
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}
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if (options->dump_shader)
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fprintf(stderr, "disasm:\n%s\n", binary->disasm_string);
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fprintf(stderr, "disasm:\n%s\n", binary.disasm_string);
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ac_shader_binary_read_config(binary, config, 0, options->supports_spill);
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ac_shader_binary_read_config(&binary, &config, 0, options->supports_spill);
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LLVMContextRef ctx = LLVMGetModuleContext(llvm_module);
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LLVMDisposeModule(llvm_module);
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@@ -3896,43 +3897,43 @@ static void ac_compile_llvm_module(struct ac_llvm_compiler *ac_llvm,
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if (stage == MESA_SHADER_FRAGMENT) {
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shader_info->num_input_vgprs = 0;
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if (G_0286CC_PERSP_SAMPLE_ENA(config->spi_ps_input_addr))
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if (G_0286CC_PERSP_SAMPLE_ENA(config.spi_ps_input_addr))
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shader_info->num_input_vgprs += 2;
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if (G_0286CC_PERSP_CENTER_ENA(config->spi_ps_input_addr))
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if (G_0286CC_PERSP_CENTER_ENA(config.spi_ps_input_addr))
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shader_info->num_input_vgprs += 2;
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if (G_0286CC_PERSP_CENTROID_ENA(config->spi_ps_input_addr))
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if (G_0286CC_PERSP_CENTROID_ENA(config.spi_ps_input_addr))
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shader_info->num_input_vgprs += 2;
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if (G_0286CC_PERSP_PULL_MODEL_ENA(config->spi_ps_input_addr))
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if (G_0286CC_PERSP_PULL_MODEL_ENA(config.spi_ps_input_addr))
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shader_info->num_input_vgprs += 3;
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if (G_0286CC_LINEAR_SAMPLE_ENA(config->spi_ps_input_addr))
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if (G_0286CC_LINEAR_SAMPLE_ENA(config.spi_ps_input_addr))
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shader_info->num_input_vgprs += 2;
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if (G_0286CC_LINEAR_CENTER_ENA(config->spi_ps_input_addr))
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if (G_0286CC_LINEAR_CENTER_ENA(config.spi_ps_input_addr))
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shader_info->num_input_vgprs += 2;
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if (G_0286CC_LINEAR_CENTROID_ENA(config->spi_ps_input_addr))
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if (G_0286CC_LINEAR_CENTROID_ENA(config.spi_ps_input_addr))
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shader_info->num_input_vgprs += 2;
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if (G_0286CC_LINE_STIPPLE_TEX_ENA(config->spi_ps_input_addr))
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if (G_0286CC_LINE_STIPPLE_TEX_ENA(config.spi_ps_input_addr))
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shader_info->num_input_vgprs += 1;
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if (G_0286CC_POS_X_FLOAT_ENA(config->spi_ps_input_addr))
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if (G_0286CC_POS_X_FLOAT_ENA(config.spi_ps_input_addr))
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shader_info->num_input_vgprs += 1;
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if (G_0286CC_POS_Y_FLOAT_ENA(config->spi_ps_input_addr))
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if (G_0286CC_POS_Y_FLOAT_ENA(config.spi_ps_input_addr))
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shader_info->num_input_vgprs += 1;
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if (G_0286CC_POS_Z_FLOAT_ENA(config->spi_ps_input_addr))
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if (G_0286CC_POS_Z_FLOAT_ENA(config.spi_ps_input_addr))
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shader_info->num_input_vgprs += 1;
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if (G_0286CC_POS_W_FLOAT_ENA(config->spi_ps_input_addr))
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if (G_0286CC_POS_W_FLOAT_ENA(config.spi_ps_input_addr))
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shader_info->num_input_vgprs += 1;
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if (G_0286CC_FRONT_FACE_ENA(config->spi_ps_input_addr))
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if (G_0286CC_FRONT_FACE_ENA(config.spi_ps_input_addr))
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shader_info->num_input_vgprs += 1;
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if (G_0286CC_ANCILLARY_ENA(config->spi_ps_input_addr))
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if (G_0286CC_ANCILLARY_ENA(config.spi_ps_input_addr))
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shader_info->num_input_vgprs += 1;
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if (G_0286CC_SAMPLE_COVERAGE_ENA(config->spi_ps_input_addr))
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if (G_0286CC_SAMPLE_COVERAGE_ENA(config.spi_ps_input_addr))
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shader_info->num_input_vgprs += 1;
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if (G_0286CC_POS_FIXED_PT_ENA(config->spi_ps_input_addr))
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if (G_0286CC_POS_FIXED_PT_ENA(config.spi_ps_input_addr))
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shader_info->num_input_vgprs += 1;
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}
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config->num_vgprs = MAX2(config->num_vgprs, shader_info->num_input_vgprs);
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config.num_vgprs = MAX2(config.num_vgprs, shader_info->num_input_vgprs);
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/* +3 for scratch wave offset and VCC */
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config->num_sgprs = MAX2(config->num_sgprs,
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config.num_sgprs = MAX2(config.num_sgprs,
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shader_info->num_input_sgprs + 3);
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/* Enable 64-bit and 16-bit denormals, because there is no performance
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@@ -3947,7 +3948,35 @@ static void ac_compile_llvm_module(struct ac_llvm_compiler *ac_llvm,
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* have to stop using those.
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* - GFX6 & GFX7 would be very slow.
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*/
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config->float_mode |= V_00B028_FP_64_DENORMS;
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config.float_mode |= V_00B028_FP_64_DENORMS;
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size_t disasm_size = binary.disasm_string ? strlen(binary.disasm_string) : 0;
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size_t llvm_ir_size = binary.llvm_ir_string ? strlen(binary.llvm_ir_string) : 0;
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size_t alloc_size = sizeof(struct radv_shader_binary_legacy) + binary.code_size +
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disasm_size + llvm_ir_size + 2;
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struct radv_shader_binary_legacy *lbin = calloc(1, alloc_size);
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memcpy(lbin->data, binary.code, binary.code_size);
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if (binary.llvm_ir_string)
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memcpy(lbin->data + binary.code_size, binary.llvm_ir_string, llvm_ir_size + 1);
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if (binary.disasm_string)
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memcpy(lbin->data + binary.code_size + llvm_ir_size + 1, binary.disasm_string, disasm_size + 1);
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lbin->base.type = RADV_BINARY_TYPE_LEGACY;
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lbin->base.stage = stage;
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lbin->base.total_size = alloc_size;
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lbin->config = config;
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lbin->code_size = binary.code_size;
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lbin->llvm_ir_size = llvm_ir_size;
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lbin->disasm_size = disasm_size;
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*rbinary = &lbin->base;
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free(binary.code);
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free(binary.config);
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free(binary.rodata);
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free(binary.global_symbol_offsets);
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free(binary.relocs);
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free(binary.disasm_string);
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free(binary.llvm_ir_string);
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}
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static void
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@@ -3990,8 +4019,7 @@ ac_fill_shader_info(struct radv_shader_variant_info *shader_info, struct nir_sha
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void
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radv_compile_nir_shader(struct ac_llvm_compiler *ac_llvm,
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struct ac_shader_binary *binary,
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struct ac_shader_config *config,
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struct radv_shader_binary **rbinary,
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struct radv_shader_variant_info *shader_info,
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struct nir_shader *const *nir,
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int nir_count,
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@@ -4003,7 +4031,7 @@ radv_compile_nir_shader(struct ac_llvm_compiler *ac_llvm,
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llvm_module = ac_translate_nir_to_llvm(ac_llvm, nir, nir_count, shader_info,
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options);
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ac_compile_llvm_module(ac_llvm, llvm_module, binary, config, shader_info,
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ac_compile_llvm_module(ac_llvm, llvm_module, rbinary, shader_info,
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nir[nir_count - 1]->info.stage, options);
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for (int i = 0; i < nir_count; ++i)
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@@ -4115,8 +4143,7 @@ ac_gs_copy_shader_emit(struct radv_shader_context *ctx)
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void
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radv_compile_gs_copy_shader(struct ac_llvm_compiler *ac_llvm,
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struct nir_shader *geom_shader,
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struct ac_shader_binary *binary,
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struct ac_shader_config *config,
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struct radv_shader_binary **rbinary,
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struct radv_shader_variant_info *shader_info,
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const struct radv_nir_compiler_options *options)
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{
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@@ -4156,6 +4183,8 @@ radv_compile_gs_copy_shader(struct ac_llvm_compiler *ac_llvm,
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ac_llvm_finalize_module(&ctx, ac_llvm->passmgr, options);
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ac_compile_llvm_module(ac_llvm, ctx.ac.module, binary, config, shader_info,
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ac_compile_llvm_module(ac_llvm, ctx.ac.module, rbinary, shader_info,
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MESA_SHADER_VERTEX, options);
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(*rbinary)->is_gs_copy_shader = true;
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}
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