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iris: make URB programming available outside iris_state.c

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Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26797>
This commit is contained in:
Lionel Landwerlin
2023-12-20 16:51:49 +02:00
committed by Marge Bot
parent 84e1f8ae70
commit 725817f429
2 changed files with 34 additions and 19 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
src/gallium/drivers/iris/iris_genx_protos.h
View File

@@ -34,6 +34,9 @@ void genX(emit_hashing_mode)(struct iris_context *ice,
struct iris_batch *batch, struct iris_batch *batch,
unsigned width, unsigned height, unsigned width, unsigned height,
unsigned scale); unsigned scale);
void genX(emit_urb_config)(struct iris_batch *batch,
bool has_tess_eval,
bool has_geometry);
void genX(emit_depth_state_workarounds)(struct iris_context *ice, void genX(emit_depth_state_workarounds)(struct iris_context *ice,
struct iris_batch *batch, struct iris_batch *batch,
const struct isl_surf *surf); const struct isl_surf *surf);
@@ -71,4 +74,3 @@ void genX(math_add32_gpr0)(struct iris_context *ice,
void genX(math_div32_gpr0)(struct iris_context *ice, void genX(math_div32_gpr0)(struct iris_context *ice,
struct iris_batch *batch, struct iris_batch *batch,
uint32_t D); uint32_t D);

49
src/gallium/drivers/iris/iris_state.c
View File

@@ -874,6 +874,34 @@ iris_emit_l3_config(struct iris_batch *batch,
#endif /* GFX_VER < 20 */ #endif /* GFX_VER < 20 */
} }
void
genX(emit_urb_config)(struct iris_batch *batch,
bool has_tess_eval,
bool has_geometry)
{
struct iris_screen *screen = batch->screen;
struct iris_context *ice = batch->ice;
intel_get_urb_config(screen->devinfo,
screen->l3_config_3d,
has_tess_eval,
has_geometry,
&ice->shaders.urb.cfg,
&ice->state.urb_deref_block_size,
&ice->shaders.urb.constrained);
genX(urb_workaround)(batch, &ice->shaders.urb.cfg);
for (int i = MESA_SHADER_VERTEX; i <= MESA_SHADER_GEOMETRY; i++) {
iris_emit_cmd(batch, GENX(3DSTATE_URB_VS), urb) {
urb._3DCommandSubOpcode += i;
urb.VSURBStartingAddress = ice->shaders.urb.cfg.start[i];
urb.VSURBEntryAllocationSize = ice->shaders.urb.cfg.size[i] - 1;
urb.VSNumberofURBEntries = ice->shaders.urb.cfg.entries[i];
}
}
}
#if GFX_VER == 9 #if GFX_VER == 9
static void static void
iris_enable_obj_preemption(struct iris_batch *batch, bool enable) iris_enable_obj_preemption(struct iris_batch *batch, bool enable)
@@ -6814,24 +6842,9 @@ iris_upload_dirty_render_state(struct iris_context *ice,
assert(ice->shaders.urb.cfg.size[i] != 0); assert(ice->shaders.urb.cfg.size[i] != 0);
} }
intel_get_urb_config(screen->devinfo, genX(emit_urb_config)(batch,
screen->l3_config_3d, ice->shaders.prog[MESA_SHADER_TESS_EVAL] != NULL,
ice->shaders.prog[MESA_SHADER_TESS_EVAL] != NULL, ice->shaders.prog[MESA_SHADER_GEOMETRY] != NULL);
ice->shaders.prog[MESA_SHADER_GEOMETRY] != NULL,
&ice->shaders.urb.cfg,
&ice->state.urb_deref_block_size,
&ice->shaders.urb.constrained);
genX(urb_workaround)(batch, &ice->shaders.urb.cfg);
for (int i = MESA_SHADER_VERTEX; i <= MESA_SHADER_GEOMETRY; i++) {
iris_emit_cmd(batch, GENX(3DSTATE_URB_VS), urb) {
urb._3DCommandSubOpcode += i;
urb.VSURBStartingAddress = ice->shaders.urb.cfg.start[i];
urb.VSURBEntryAllocationSize = ice->shaders.urb.cfg.size[i] - 1;
urb.VSNumberofURBEntries = ice->shaders.urb.cfg.entries[i];
}
}
} }
if (dirty & IRIS_DIRTY_BLEND_STATE) { if (dirty & IRIS_DIRTY_BLEND_STATE) {