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i965/gen7: Factor out texture surface state set-up from gen7_update_texture_surface().

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This moves most of the surface state set-up logic that can be shared
between textures and shader images to a separate function.
This commit is contained in:
Francisco Jerez
2015-04-13 21:37:02 +03:00
parent e94c80c08b
commit 6f26ffaf66
2 changed files with 84 additions and 54 deletions
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11
src/mesa/drivers/dri/i965/brw_context.h
View File

@@ -972,6 +972,17 @@ struct brw_context
bool layered,
unsigned unit);
void (*emit_texture_surface_state)(struct brw_context *brw,
struct intel_mipmap_tree *mt,
GLenum target,
unsigned min_layer,
unsigned max_layer,
unsigned min_level,
unsigned max_level,
unsigned format,
unsigned swizzle,
uint32_t *surf_offset,
bool rw, bool for_gather);
void (*emit_buffer_surface_state)(struct brw_context *brw,
uint32_t *out_offset,
drm_intel_bo *bo,

127
src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
View File

@@ -264,40 +264,28 @@ gen7_emit_buffer_surface_state(struct brw_context *brw,
}
static void
gen7_update_texture_surface(struct gl_context *ctx,
unsigned unit,
uint32_t *surf_offset,
bool for_gather)
gen7_emit_texture_surface_state(struct brw_context *brw,
struct intel_mipmap_tree *mt,
GLenum target,
unsigned min_layer, unsigned max_layer,
unsigned min_level, unsigned max_level,
unsigned format,
unsigned swizzle,
uint32_t *surf_offset,
bool rw, bool for_gather)
{
struct brw_context *brw = brw_context(ctx);
struct gl_texture_object *tObj = ctx->Texture.Unit[unit]._Current;
struct intel_texture_object *intelObj = intel_texture_object(tObj);
struct intel_mipmap_tree *mt = intelObj->mt;
struct gl_texture_image *firstImage = tObj->Image[0][tObj->BaseLevel];
struct gl_sampler_object *sampler = _mesa_get_samplerobj(ctx, unit);
if (tObj->Target == GL_TEXTURE_BUFFER) {
brw_update_buffer_texture_surface(ctx, unit, surf_offset);
return;
}
const unsigned depth = max_layer - min_layer;
uint32_t *surf = brw_state_batch(brw, AUB_TRACE_SURFACE_STATE,
8 * 4, 32, surf_offset);
memset(surf, 0, 8 * 4);
uint32_t tex_format = translate_tex_format(brw,
intelObj->_Format,
sampler->sRGBDecode);
if (for_gather && tex_format == BRW_SURFACEFORMAT_R32G32_FLOAT)
tex_format = BRW_SURFACEFORMAT_R32G32_FLOAT_LD;
surf[0] = translate_tex_target(tObj->Target) << BRW_SURFACE_TYPE_SHIFT |
tex_format << BRW_SURFACE_FORMAT_SHIFT |
surf[0] = translate_tex_target(target) << BRW_SURFACE_TYPE_SHIFT |
format << BRW_SURFACE_FORMAT_SHIFT |
gen7_surface_tiling_mode(mt->tiling);
/* mask of faces present in cube map; for other surfaces MBZ. */
if (tObj->Target == GL_TEXTURE_CUBE_MAP || tObj->Target == GL_TEXTURE_CUBE_MAP_ARRAY)
if (target == GL_TEXTURE_CUBE_MAP || target == GL_TEXTURE_CUBE_MAP_ARRAY)
surf[0] |= BRW_SURFACE_CUBEFACE_ENABLES;
if (mt->align_h == 4)
@@ -305,16 +293,9 @@ gen7_update_texture_surface(struct gl_context *ctx,
if (mt->align_w == 8)
surf[0] |= GEN7_SURFACE_HALIGN_8;
if (_mesa_is_array_texture(tObj->Target) ||
tObj->Target == GL_TEXTURE_CUBE_MAP)
if (_mesa_is_array_texture(target) || target == GL_TEXTURE_CUBE_MAP)
surf[0] |= GEN7_SURFACE_IS_ARRAY;
/* if this is a view with restricted NumLayers, then
* our effective depth is not just the miptree depth.
*/
uint32_t effective_depth = (tObj->Immutable && tObj->Target != GL_TEXTURE_3D)
? tObj->NumLayers : mt->logical_depth0;
if (mt->array_layout == ALL_SLICES_AT_EACH_LOD)
surf[0] |= GEN7_SURFACE_ARYSPC_LOD0;
@@ -323,37 +304,25 @@ gen7_update_texture_surface(struct gl_context *ctx,
surf[2] = SET_FIELD(mt->logical_width0 - 1, GEN7_SURFACE_WIDTH) |
SET_FIELD(mt->logical_height0 - 1, GEN7_SURFACE_HEIGHT);
surf[3] = SET_FIELD(effective_depth - 1, BRW_SURFACE_DEPTH) |
surf[3] = SET_FIELD(depth - 1, BRW_SURFACE_DEPTH) |
(mt->pitch - 1);
if (brw->is_haswell && tObj->_IsIntegerFormat)
if (brw->is_haswell && _mesa_is_format_integer(mt->format))
surf[3] |= HSW_SURFACE_IS_INTEGER_FORMAT;
surf[4] = gen7_surface_msaa_bits(mt->num_samples, mt->msaa_layout) |
SET_FIELD(tObj->MinLayer, GEN7_SURFACE_MIN_ARRAY_ELEMENT) |
SET_FIELD((effective_depth - 1),
GEN7_SURFACE_RENDER_TARGET_VIEW_EXTENT);
SET_FIELD(min_layer, GEN7_SURFACE_MIN_ARRAY_ELEMENT) |
SET_FIELD(depth - 1, GEN7_SURFACE_RENDER_TARGET_VIEW_EXTENT);
surf[5] = (SET_FIELD(GEN7_MOCS_L3, GEN7_SURFACE_MOCS) |
SET_FIELD(tObj->MinLevel + tObj->BaseLevel - mt->first_level, GEN7_SURFACE_MIN_LOD) |
SET_FIELD(min_level - mt->first_level, GEN7_SURFACE_MIN_LOD) |
/* mip count */
(intelObj->_MaxLevel - tObj->BaseLevel));
(max_level - min_level - 1));
surf[7] = mt->fast_clear_color_value;
if (brw->is_haswell) {
/* Handling GL_ALPHA as a surface format override breaks 1.30+ style
* texturing functions that return a float, as our code generation always
* selects the .x channel (which would always be 0).
*/
const bool alpha_depth = tObj->DepthMode == GL_ALPHA &&
(firstImage->_BaseFormat == GL_DEPTH_COMPONENT ||
firstImage->_BaseFormat == GL_DEPTH_STENCIL);
const int swizzle = unlikely(alpha_depth)
? SWIZZLE_XYZW : brw_get_texture_swizzle(ctx, tObj);
const bool need_scs_green_to_blue = for_gather && tex_format == BRW_SURFACEFORMAT_R32G32_FLOAT_LD;
const bool need_scs_green_to_blue = for_gather && format == BRW_SURFACEFORMAT_R32G32_FLOAT_LD;
surf[7] |=
SET_FIELD(swizzle_to_scs(GET_SWZ(swizzle, 0), need_scs_green_to_blue), GEN7_SURFACE_SCS_R) |
@@ -372,11 +341,60 @@ gen7_update_texture_surface(struct gl_context *ctx,
*surf_offset + 4,
mt->bo,
surf[1] - mt->bo->offset64,
I915_GEM_DOMAIN_SAMPLER, 0);
I915_GEM_DOMAIN_SAMPLER,
(rw ? I915_GEM_DOMAIN_SAMPLER : 0));
gen7_check_surface_setup(surf, false /* is_render_target */);
}
static void
gen7_update_texture_surface(struct gl_context *ctx,
unsigned unit,
uint32_t *surf_offset,
bool for_gather)
{
struct brw_context *brw = brw_context(ctx);
struct gl_texture_object *obj = ctx->Texture.Unit[unit]._Current;
if (obj->Target == GL_TEXTURE_BUFFER) {
brw_update_buffer_texture_surface(ctx, unit, surf_offset);
} else {
struct intel_texture_object *intel_obj = intel_texture_object(obj);
struct intel_mipmap_tree *mt = intel_obj->mt;
struct gl_sampler_object *sampler = _mesa_get_samplerobj(ctx, unit);
/* If this is a view with restricted NumLayers, then our effective depth
* is not just the miptree depth.
*/
const unsigned depth = (obj->Immutable && obj->Target != GL_TEXTURE_3D ?
obj->NumLayers : mt->logical_depth0);
/* Handling GL_ALPHA as a surface format override breaks 1.30+ style
* texturing functions that return a float, as our code generation always
* selects the .x channel (which would always be 0).
*/
struct gl_texture_image *firstImage = obj->Image[0][obj->BaseLevel];
const bool alpha_depth = obj->DepthMode == GL_ALPHA &&
(firstImage->_BaseFormat == GL_DEPTH_COMPONENT ||
firstImage->_BaseFormat == GL_DEPTH_STENCIL);
const unsigned swizzle = (unlikely(alpha_depth) ? SWIZZLE_XYZW :
brw_get_texture_swizzle(&brw->ctx, obj));
unsigned format = translate_tex_format(
brw, intel_obj->_Format, sampler->sRGBDecode);
if (for_gather && format == BRW_SURFACEFORMAT_R32G32_FLOAT)
format = BRW_SURFACEFORMAT_R32G32_FLOAT_LD;
gen7_emit_texture_surface_state(brw, mt, obj->Target,
obj->MinLayer, obj->MinLayer + depth,
obj->MinLevel + obj->BaseLevel,
obj->MinLevel + intel_obj->_MaxLevel + 1,
format, swizzle,
surf_offset, false, for_gather);
}
}
/**
* Creates a null surface.
*
@@ -550,5 +568,6 @@ gen7_init_vtable_surface_functions(struct brw_context *brw)
brw->vtbl.update_texture_surface = gen7_update_texture_surface;
brw->vtbl.update_renderbuffer_surface = gen7_update_renderbuffer_surface;
brw->vtbl.emit_null_surface_state = gen7_emit_null_surface_state;
brw->vtbl.emit_texture_surface_state = gen7_emit_texture_surface_state;
brw->vtbl.emit_buffer_surface_state = gen7_emit_buffer_surface_state;
}