pan/bi: Implement packing ops between 32-bit vec1 and 16-bit vec2
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8358>
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@@ -900,6 +900,7 @@ bi_emit_alu(bi_builder *b, nir_alu_instr *instr)
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* are the exceptions that need to handle swizzles specially. */
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switch (instr->op) {
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case nir_op_pack_32_2x16:
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case nir_op_vec2:
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case nir_op_vec3:
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case nir_op_vec4: {
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@@ -925,6 +926,7 @@ bi_emit_alu(bi_builder *b, nir_alu_instr *instr)
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case nir_op_vec16:
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unreachable("should've been lowered");
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case nir_op_unpack_32_2x16:
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case nir_op_unpack_64_2x32_split_x:
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bi_mov_i32_to(b, dst, bi_src_index(&instr->src[0].src));
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return;
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