d3d12: Subgroup ballot
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27528>
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@@ -306,7 +306,7 @@ Khronos, ARB, and OES extensions that are not part of any OpenGL or OpenGL ES ve
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GL_ARB_robustness_isolation not started
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GL_ARB_sample_locations DONE (freedreno/a6xx, nvc0, zink)
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GL_ARB_seamless_cubemap_per_texture DONE (etnaviv/SEAMLESS_CUBE_MAP, freedreno, nvc0, r600, radeonsi, softpipe, virgl, zink, asahi, iris, crocus)
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GL_ARB_shader_ballot DONE (nvc0, radeonsi, zink, iris, crocus/gen8)
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GL_ARB_shader_ballot DONE (nvc0, radeonsi, zink, iris, crocus/gen8, d3d12)
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GL_ARB_shader_clock DONE (nv50, nvc0, r600, radeonsi, llvmpipe, virgl, zink, iris, crocus/gen7+)
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GL_ARB_shader_stencil_export DONE (r600, radeonsi, softpipe, llvmpipe, virgl, panfrost, zink, asahi, iris/gen9+)
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GL_ARB_shader_viewport_layer_array DONE (freedreno/a6xx, nvc0, radeonsi, zink, iris, crocus/gen6+)
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@@ -131,6 +131,40 @@ compile_nir(struct d3d12_context *ctx, struct d3d12_shader_selector *sel,
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shader->has_default_ubo0 = num_uniforms_before_lower_to_ubo > 0 &&
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nir->info.num_ubos > num_ubos_before_lower_to_ubo;
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NIR_PASS_V(nir, dxil_nir_lower_subgroup_id);
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NIR_PASS_V(nir, dxil_nir_lower_num_subgroups);
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nir_lower_subgroups_options subgroup_options = {};
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subgroup_options.ballot_bit_size = 32;
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subgroup_options.ballot_components = 4;
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subgroup_options.lower_subgroup_masks = true;
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subgroup_options.lower_to_scalar = true;
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subgroup_options.lower_relative_shuffle = true;
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subgroup_options.lower_inverse_ballot = true;
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if (nir->info.stage != MESA_SHADER_FRAGMENT && nir->info.stage != MESA_SHADER_COMPUTE)
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subgroup_options.lower_quad = true;
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NIR_PASS_V(nir, nir_lower_subgroups, &subgroup_options);
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NIR_PASS_V(nir, nir_lower_bit_size, [](const nir_instr *instr, void *) -> unsigned {
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if (instr->type != nir_instr_type_intrinsic)
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return 0;
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nir_intrinsic_instr *intr = nir_instr_as_intrinsic(instr);
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switch (intr->intrinsic) {
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case nir_intrinsic_quad_swap_horizontal:
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case nir_intrinsic_quad_swap_vertical:
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case nir_intrinsic_quad_swap_diagonal:
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case nir_intrinsic_reduce:
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case nir_intrinsic_inclusive_scan:
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case nir_intrinsic_exclusive_scan:
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return intr->def.bit_size == 1 ? 32 : 0;
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default:
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return 0;
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}
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}, NULL);
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// Ensure subgroup scans on bools are gone
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NIR_PASS_V(nir, nir_opt_dce);
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NIR_PASS_V(nir, dxil_nir_lower_unsupported_subgroup_scan);
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if (key->last_vertex_processing_stage) {
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if (key->invert_depth)
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NIR_PASS_V(nir, d3d12_nir_invert_depth, key->invert_depth, key->halfz);
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@@ -344,6 +344,7 @@ d3d12_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
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case PIPE_CAP_GL_SPIRV:
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case PIPE_CAP_POLYGON_OFFSET_CLAMP:
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case PIPE_CAP_SHADER_GROUP_VOTE:
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case PIPE_CAP_SHADER_BALLOT:
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case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
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case PIPE_CAP_QUERY_SO_OVERFLOW:
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return 1;
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