radv,aco: add a workaround for binding 2D views of a 3D image on GFX9
The hardware can't bind a slice of a 3D image as a 2D image, GFX10+ introduced ARRAY_PITCH to allow this without a shader workaround. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Rhys Perry <pendingchaos02@gmail.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16294>
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@@ -5890,6 +5890,22 @@ get_image_coords(isel_context* ctx, const nir_intrinsic_instr* instr)
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coords[i] = emit_extract_vector(ctx, src0, i, v1);
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coords[i] = emit_extract_vector(ctx, src0, i, v1);
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}
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}
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if (ctx->options->key.image_2d_view_of_3d &&
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dim == GLSL_SAMPLER_DIM_2D && !is_array) {
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/* The hw can't bind a slice of a 3D image as a 2D image, because it
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* ignores BASE_ARRAY if the target is 3D. The workaround is to read
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* BASE_ARRAY and set it as the 3rd address operand for all 2D images.
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*/
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assert(ctx->options->chip_class == GFX9);
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Temp rsrc = bld.as_uniform(get_ssa_temp(ctx, instr->src[0].ssa));
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Temp rsrc_word5 = emit_extract_vector(ctx, rsrc, 5, v1);
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/* Extract the BASE_ARRAY field [0:12] from the descriptor. */
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Temp first_layer =
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bld.vop3(aco_opcode::v_bfe_u32, bld.def(v1), rsrc_word5,
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Operand::c32(0u), Operand::c32(13u));
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coords.emplace_back(first_layer);
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}
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if (instr->intrinsic == nir_intrinsic_bindless_image_load ||
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if (instr->intrinsic == nir_intrinsic_bindless_image_load ||
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instr->intrinsic == nir_intrinsic_bindless_image_sparse_load ||
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instr->intrinsic == nir_intrinsic_bindless_image_sparse_load ||
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instr->intrinsic == nir_intrinsic_bindless_image_store) {
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instr->intrinsic == nir_intrinsic_bindless_image_store) {
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@@ -3124,6 +3124,7 @@ radv_CreateDevice(VkPhysicalDevice physicalDevice, const VkDeviceCreateInfo *pCr
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bool image_float32_atomics = false;
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bool image_float32_atomics = false;
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bool vs_prologs = false;
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bool vs_prologs = false;
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bool global_bo_list = false;
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bool global_bo_list = false;
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bool image_2d_view_of_3d = false;
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/* Check enabled features */
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/* Check enabled features */
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if (pCreateInfo->pEnabledFeatures) {
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if (pCreateInfo->pEnabledFeatures) {
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@@ -3190,6 +3191,12 @@ radv_CreateDevice(VkPhysicalDevice physicalDevice, const VkDeviceCreateInfo *pCr
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global_bo_list = true;
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global_bo_list = true;
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break;
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break;
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}
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}
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case VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_IMAGE_2D_VIEW_OF_3D_FEATURES_EXT: {
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const VkPhysicalDeviceImage2DViewOf3DFeaturesEXT *features = (const void *)ext;
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if (features->image2DViewOf3D)
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image_2d_view_of_3d = true;
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break;
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}
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default:
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default:
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break;
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break;
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}
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}
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@@ -3252,6 +3259,8 @@ radv_CreateDevice(VkPhysicalDevice physicalDevice, const VkDeviceCreateInfo *pCr
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device->image_float32_atomics = image_float32_atomics;
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device->image_float32_atomics = image_float32_atomics;
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device->image_2d_view_of_3d = image_2d_view_of_3d;
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radv_init_shader_arenas(device);
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radv_init_shader_arenas(device);
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device->overallocation_disallowed = overallocation_disallowed;
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device->overallocation_disallowed = overallocation_disallowed;
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@@ -3061,6 +3061,9 @@ radv_generate_pipeline_key(const struct radv_pipeline *pipeline, VkPipelineCreat
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key.disable_aniso_single_level = device->instance->disable_aniso_single_level &&
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key.disable_aniso_single_level = device->instance->disable_aniso_single_level &&
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device->physical_device->rad_info.chip_class < GFX8;
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device->physical_device->rad_info.chip_class < GFX8;
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key.image_2d_view_of_3d = device->image_2d_view_of_3d &&
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device->physical_device->rad_info.chip_class == GFX9;
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return key;
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return key;
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}
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}
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@@ -839,6 +839,9 @@ struct radv_device {
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/* Whether shader image 32-bit float atomics are enabled. */
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/* Whether shader image 32-bit float atomics are enabled. */
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bool image_float32_atomics;
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bool image_float32_atomics;
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/* Whether 2D views of 3D image is enabled. */
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bool image_2d_view_of_3d;
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/* Whether anisotropy is forced with RADV_TEX_ANISO (-1 is disabled). */
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/* Whether anisotropy is forced with RADV_TEX_ANISO (-1 is disabled). */
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int force_aniso;
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int force_aniso;
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@@ -65,6 +65,7 @@ struct radv_pipeline_key {
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uint32_t adjust_frag_coord_z : 1;
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uint32_t adjust_frag_coord_z : 1;
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uint32_t disable_aniso_single_level : 1;
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uint32_t disable_aniso_single_level : 1;
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uint32_t disable_sinking_load_input_fs : 1;
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uint32_t disable_sinking_load_input_fs : 1;
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uint32_t image_2d_view_of_3d : 1;
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struct {
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struct {
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uint32_t instance_rate_inputs;
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uint32_t instance_rate_inputs;
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