i965/blorp: Add driver mocs settings to the context

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>

src/mesa/drivers/dri/i965/blorp.c

@@ -228,15 +228,13 @@ struct surface_state_info {
    unsigned ss_align; /* Required alignment of RENDER_SURFACE_STATE in bytes */
    unsigned reloc_dw;
    unsigned aux_reloc_dw;
-   unsigned tex_mocs;
-   unsigned rb_mocs;
 };
 
 static const struct surface_state_info surface_state_infos[] = {
    [6] = {6,  32, 1,  0},
-   [7] = {8,  32, 1,  6,  GEN7_MOCS_L3, GEN7_MOCS_L3},
+   [7] = {8,  32, 1,  6},
-   [8] = {13, 64, 8,  10, BDW_MOCS_WB,  BDW_MOCS_PTE},
+   [8] = {13, 64, 8,  10},
-   [9] = {16, 64, 8,  10, SKL_MOCS_WB,  SKL_MOCS_PTE},
+   [9] = {16, 64, 8,  10},
 };
 
 uint32_t
@@ -265,7 +263,8 @@ brw_blorp_emit_surface_state(struct brw_context *brw,
                                   ss_info.num_dwords * 4, ss_info.ss_align,
                                   &surf_offset);
 
-   const uint32_t mocs = is_render_target ? ss_info.rb_mocs : ss_info.tex_mocs;
+   const uint32_t mocs =
+      is_render_target ? brw->blorp.mocs.rb : brw->blorp.mocs.tex;
    uint64_t aux_bo_offset = surface->aux_bo ? surface->aux_bo->offset64 : 0;
 
    isl_surf_fill_state(&brw->isl_dev, dw, .surf = &surf, .view = &surface->view,

src/mesa/drivers/dri/i965/blorp.h

@@ -42,6 +42,12 @@ struct blorp_context {
 
    const struct isl_device *isl_dev;
 
+   struct {
+      uint32_t tex;
+      uint32_t rb;
+      uint32_t vb;
+   } mocs;
+
    bool (*lookup_shader)(struct blorp_context *blorp,
                          const void *key, uint32_t key_size,
                          uint32_t *kernel_out, void *prog_data_out);

src/mesa/drivers/dri/i965/brw_blorp.c

@@ -30,6 +30,7 @@
 
 #include "brw_blorp.h"
 #include "brw_context.h"
+#include "brw_defines.h"
 #include "brw_meta_util.h"
 #include "brw_state.h"
 #include "intel_fbo.h"
@@ -65,6 +66,31 @@ brw_blorp_init(struct brw_context *brw)
 {
    blorp_init(&brw->blorp, brw, &brw->isl_dev);
 
+   switch (brw->gen) {
+   case 6:
+      brw->blorp.mocs.tex = 0;
+      brw->blorp.mocs.rb = 0;
+      brw->blorp.mocs.vb = 0;
+      break;
+   case 7:
+      brw->blorp.mocs.tex = GEN7_MOCS_L3;
+      brw->blorp.mocs.rb = GEN7_MOCS_L3;
+      brw->blorp.mocs.vb = GEN7_MOCS_L3;
+      break;
+   case 8:
+      brw->blorp.mocs.tex = BDW_MOCS_WB;
+      brw->blorp.mocs.rb = BDW_MOCS_PTE;
+      brw->blorp.mocs.vb = BDW_MOCS_WB;
+      break;
+   case 9:
+      brw->blorp.mocs.tex = SKL_MOCS_WB;
+      brw->blorp.mocs.rb = SKL_MOCS_PTE;
+      brw->blorp.mocs.vb = SKL_MOCS_WB;
+      break;
+   default:
+      unreachable("Invalid gen");
+   }
+
    brw->blorp.lookup_shader = brw_blorp_lookup_shader;
    brw->blorp.upload_shader = brw_blorp_upload_shader;
 }

src/mesa/drivers/dri/i965/genX_blorp_exec.c

@@ -277,21 +277,11 @@ blorp_emit_vertex_buffers(struct brw_context *brw,
 
    unsigned num_buffers = 1;
 
-#if GEN_GEN == 9
-   uint32_t mocs = (2 << 1); /* SKL_MOCS_WB */
-#elif GEN_GEN == 8
-   uint32_t mocs = 0x78; /* BDW_MOCS_WB */
-#elif GEN_GEN == 7
-   uint32_t mocs = 1; /* GEN7_MOCS_L3 */
-#else
-   uint32_t mocs = 0;
-#endif
-
    uint32_t size;
    blorp_emit_vertex_data(brw, params, &vb[0].BufferStartingAddress, &size);
    vb[0].VertexBufferIndex = 0;
    vb[0].BufferPitch = 2 * sizeof(float);
-   vb[0].VertexBufferMOCS = mocs;
+   vb[0].VertexBufferMOCS = brw->blorp.mocs.vb;
 #if GEN_GEN >= 7
    vb[0].AddressModifyEnable = true;
 #endif
@@ -308,7 +298,7 @@ blorp_emit_vertex_buffers(struct brw_context *brw,
                                     &vb[1].BufferStartingAddress, &size);
       vb[1].VertexBufferIndex = 1;
       vb[1].BufferPitch = 0;
-      vb[1].VertexBufferMOCS = mocs;
+      vb[1].VertexBufferMOCS = brw->blorp.mocs.vb;
 #if GEN_GEN >= 7
       vb[1].AddressModifyEnable = true;
 #endif