i965: Add norbc debug option
This INTEL_DEBUG option disables lossless compression (also known as render buffer compression). v2: (Matt) Use likely(!lossless_compression_disabled) instead of !likely(lossless_compression_disabled) (Grazvydas) Update docs/envvars.html Cc: "12.0" <mesa-stable@lists.freedesktop.org> Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com> Reviewed-by: Matt Turner <mattst88@gmail.com> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
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@@ -166,6 +166,7 @@ See the <a href="xlibdriver.html">Xlib software driver page</a> for details.
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<li>vec4 - force vec4 mode in vertex shader</li>
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<li>spill_fs - force spilling of all registers in the scalar backend (useful to debug spilling code)</li>
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<li>spill_vec4 - force spilling of all registers in the vec4 backend (useful to debug spilling code)</li>
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<li>norbc - disable single sampled render buffer compression</li>
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</ul>
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</ul>
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@@ -80,6 +80,7 @@ static const struct debug_control debug_control[] = {
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{ "tes", DEBUG_TES },
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{ "l3", DEBUG_L3 },
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{ "do32", DEBUG_DO32 },
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{ "norbc", DEBUG_NO_RBC },
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{ NULL, 0 }
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};
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@@ -73,6 +73,7 @@ extern uint64_t INTEL_DEBUG;
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#define DEBUG_TES (1ull << 37)
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#define DEBUG_L3 (1ull << 38)
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#define DEBUG_DO32 (1ull << 39)
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#define DEBUG_NO_RBC (1ull << 40)
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#ifdef HAVE_ANDROID_PLATFORM
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#define LOG_TAG "INTEL-MESA"
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@@ -1620,7 +1620,9 @@ intel_miptree_alloc_non_msrt_mcs(struct brw_context *brw,
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* single-sampled buffers. Disabling compression allows us to skip
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* resolves.
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*/
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const bool lossless_compression_disabled = INTEL_DEBUG & DEBUG_NO_RBC;
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const bool is_lossless_compressed =
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unlikely(!lossless_compression_disabled) &&
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brw->gen >= 9 && !mt->is_scanout &&
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intel_miptree_supports_lossless_compressed(brw, mt);
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