OpenHarmony/third_party_mesa3d
2
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

intel/fs: Perform 64-bit SEL_EXEC lowering in the lower_regioning pass.

Browse Source 
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14273>
This commit is contained in:
Francisco Jerez
2021-12-20 14:33:45 -08:00
committed by Marge Bot
parent 9449b71bdd
commit 6c8782c135
2 changed files with 15 additions and 19 deletions
Download Patch File Download Diff File Expand all files Collapse all files

25
src/intel/compiler/brw_fs_generator.cpp
View File

@@ -2447,25 +2447,12 @@ fs_generator::generate_code(const cfg_t *cfg, int dispatch_width,
case SHADER_OPCODE_SEL_EXEC: case SHADER_OPCODE_SEL_EXEC:
assert(inst->force_writemask_all); assert(inst->force_writemask_all);
if (type_sz(dst.type) > 4 && !devinfo->has_64bit_float) { assert(devinfo->has_64bit_float || type_sz(dst.type) <= 4);
brw_set_default_mask_control(p, BRW_MASK_DISABLE); brw_set_default_mask_control(p, BRW_MASK_DISABLE);
brw_MOV(p, subscript(dst, BRW_REGISTER_TYPE_UD, 0), brw_MOV(p, dst, src[1]);
subscript(src[1], BRW_REGISTER_TYPE_UD, 0)); brw_set_default_mask_control(p, BRW_MASK_ENABLE);
brw_set_default_swsb(p, tgl_swsb_null()); brw_set_default_swsb(p, tgl_swsb_null());
brw_MOV(p, subscript(dst, BRW_REGISTER_TYPE_UD, 1), brw_MOV(p, dst, src[0]);
subscript(src[1], BRW_REGISTER_TYPE_UD, 1));
brw_set_default_mask_control(p, BRW_MASK_ENABLE);
brw_MOV(p, subscript(dst, BRW_REGISTER_TYPE_UD, 0),
subscript(src[0], BRW_REGISTER_TYPE_UD, 0));
brw_MOV(p, subscript(dst, BRW_REGISTER_TYPE_UD, 1),
subscript(src[0], BRW_REGISTER_TYPE_UD, 1));
} else {
brw_set_default_mask_control(p, BRW_MASK_DISABLE);
brw_MOV(p, dst, src[1]);
brw_set_default_mask_control(p, BRW_MASK_ENABLE);
brw_set_default_swsb(p, tgl_swsb_null());
brw_MOV(p, dst, src[0]);
}
break; break;
case SHADER_OPCODE_QUAD_SWIZZLE: case SHADER_OPCODE_QUAD_SWIZZLE:

9
src/intel/compiler/brw_fs_lower_regioning.cpp
View File

@@ -154,6 +154,12 @@ namespace {
else else
return t; return t;
case SHADER_OPCODE_SEL_EXEC:
if (!has_64bit && type_sz(t) > 4)
return BRW_REGISTER_TYPE_UD;
else
return t;
case SHADER_OPCODE_QUAD_SWIZZLE: case SHADER_OPCODE_QUAD_SWIZZLE:
if (has_dst_aligned_region_restriction(devinfo, inst)) if (has_dst_aligned_region_restriction(devinfo, inst))
return brw_int_type(type_sz(t), false); return brw_int_type(type_sz(t), false);
@@ -260,6 +266,9 @@ namespace {
case SHADER_OPCODE_MOV_INDIRECT: case SHADER_OPCODE_MOV_INDIRECT:
return 0x1; return 0x1;
case SHADER_OPCODE_SEL_EXEC:
return 0x3;
default: default:
unreachable("Unknown invalid execution type source mask."); unreachable("Unknown invalid execution type source mask.");
} }